MOSFET WITH GATE PULL-DOWN
    1.
    发明申请
    MOSFET WITH GATE PULL-DOWN 审中-公开
    带有栅极拉下的MOSFET

    公开(公告)号:WO2011079194A3

    公开(公告)日:2011-10-20

    申请号:PCT/US2010061784

    申请日:2010-12-22

    CPC classification number: H03K17/165 H03K17/687

    Abstract: A pull-down MOSFET (110) is coupled between a drain and gate of a MOSFET main switch transistor (102) in a switching type DC-to-DC power converter. A gate of the pull-down MOSFET (110) is coupled to the drain of the main switch transistor (102) by a capacitor 118 and is connected to a source of the main switch transistor (102) by a resistor (120). The pull-down MOSFET (110) is operated by capacitive coupling to the voltage drop across the main switch transistor (102) and can be used to hold the gate of the main switch transistor (102) at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor (102) by the Miller effect.

    Abstract translation: 下拉MOSFET(110)耦合在开关型DC-DC功率转换器中的MOSFET主开关晶体管(102)的漏极和栅极之间。 下拉MOSFET(110)的栅极通过电容器118耦合到主开关晶体管(102)的漏极,并且通过电阻器(120)连接到主开关晶体管(102)的源极。 下拉MOSFET(110)通过对主开关晶体管(102)两端的电压降进行电容耦合来操作,并且可以用来将主开关晶体管(102)的栅极保持在其源极电位或其附近,以避免 通过米勒效应减少主开关晶体管(102)的无意导通。

    EMITTER-SWITCHED THYRISTOR
    2.
    发明申请
    EMITTER-SWITCHED THYRISTOR 审中-公开
    辐射源控晶闸管

    公开(公告)号:WO1998012749A2

    公开(公告)日:1998-03-26

    申请号:PCT/EP1997005165

    申请日:1997-09-20

    CPC classification number: H01L29/749 H01L29/7436 H01L29/7455

    Abstract: In an emitter-switched thyristor with a main thyristor (TH) composed of a p+ anode emitter (1), a drift zone (3') of opposite conductivity type, a zone (4) which has in the switched-off state a blocking zone with respect to zone (3) and an emitter zone (5) at the cathode side, again with an opposite conductivity type, so that a p+n-pn+ zone sequence results, a transistor structure (T) composed of the first three zones of alternating conductivity is provided in parallel thereto with an emitter (1), a base (3) and a collector (8). This structure contains a NMOSFET (M1) for directly driving the cathode emitters (5) through the cathode connection (KA). The source of this transistor is contacted by the cathode, as well as the collector zone (8) which forms the channel zone of the MOSFET at the surface of the semiconductor. The corresponding drain zone is connected to the n+ cathode emitter (5) of the main thyristor (TH) by an electric conductor (6). A switching-in DMOSFET (M2) is further provided whose gate (G2) is connected to the gate (G1) of the NMOSFET (M1), a source (S2) contacted by the cathode (K) and embedded in a p-base. A conductive connection is established with the cathode contact of the switching-in NMOSFET (M1), and the common connection extends up to a cathode connection (KA). A drain zone (D2) is embedded in the drift zone (3) and the substrate zones of M1 and M2 are in contact with the cathode. The structure contains a PMOSFET (M3) whose gate is connected to the cathode, whose drain (D3) forms a part of the collector zone (8) of the transistor (T) for the secondary current, whose source zone is connected to the base zone (4) of the main thyristor (TH) next to the cathode and whose substrate zone is formed by a part of the n-doped zone (3) adjacent to the surface of the component.

    Abstract translation: 在具有主闸流管(TH)的发射极控晶闸管,它由相反导电类型的p + -Anodenemitter(1),一个漂移区(3“)的,一个区(4),其具有相对于处于关闭状态的阻挡区的区域(3) 和阴极侧发射极区(5)被形成,又具有相反导电类型,以便一个区序列p +产生正的pn +是一个由交替的具有发射极导电性的第一三个区域这躺在并联的晶体管结构(T)(1)碱的(3 )和集电极(8)。 该结构包括用于阴极发射器(5)由阴极端子(KA),其特征在于,该晶体管的源极由阴极以及集电区接触的直接控制的NMOS(M1)(8)附接到所述半导体,沟道区的表面 的经由电导体的MOSFET形式,与相关联的漏区(6)被连接到主晶闸管(TH)的第n + -Kathodenemitter(5)。 此外,电源DMOSFET(M2)被提供,其栅极连接(G2)的NMOSFET(M1)的栅极(G1),源极(S2),它是由与阴极(K)接触,并在一个P- 被嵌入的基础上,其特征在于,与所述NMOSFET的阴极接触,用于切换(M1),以及到阴极端子(KA)的共同连接的导电连接被引导。 漏区(D2)被嵌入在漂移区(3),其中所述衬底区域由M1和M2与阴极接触。 该结构包括一个PMOSFET(M3),其栅极连接到所述阴极,且其漏极(D3)是集电极区的一部分(8)的晶体管(T)的次级流,它具有阴极附近的基极区的源极区(4)的主晶闸管( TH)连接,并且其衬底区是由邻近于所述设备的表面的n型掺杂区(3)的一部分而形成。

    POWER FIELD EFFECT TRANSISTOR
    3.
    发明申请
    POWER FIELD EFFECT TRANSISTOR 审中-公开
    功率场效应晶体管

    公开(公告)号:WO1997033322A1

    公开(公告)日:1997-09-12

    申请号:PCT/EP1997000925

    申请日:1997-02-26

    CPC classification number: H01L29/7802 H01L29/0878 H01L29/66712 H01L29/7832

    Abstract: The invention relates to a power field effect transistor with a drain contact on a substrate, a drift region, a gate and a source contact, in which the electrode arrangement of the field effect transistor is predominantly vertical with a buried gate, where the channel region (5) runs substantially laterally along the buried gate region (7) and the upper gate (20) and is connected to the drift region (4) via a connecting region (18) and a conductive region (14).

    Abstract translation: 本发明涉及具有安装在一个基板漏极接触,漂移区,栅极和源极接触,其中所述场效应晶体管的电极配置与掩埋栅主要垂直地形成一个功率场效应晶体管,并且是该沟道区域 (5)沿着所述掩埋栅极区域(7)和上覆的栅极(20)大致横向并且经由连接区域(18)和一个通道区域(14)与所述漂移区(4)连接。

    FIELD-EFFECT-CONTROLLED SEMICONDUCTOR COMPONENT
    4.
    发明申请
    FIELD-EFFECT-CONTROLLED SEMICONDUCTOR COMPONENT 审中-公开
    场效应控制半导体元件

    公开(公告)号:WO1991010265A1

    公开(公告)日:1991-07-11

    申请号:PCT/EP1990002222

    申请日:1990-12-18

    CPC classification number: H01L29/742 H01L29/7455 H01L29/749

    Abstract: In order to combine the good transmission characteristics and good control characteristics of a MOS-controlled thyristor (MCT) wiht the resistance to shorting of an insulated-gate transistor (IGT), at the same time broadening the safe operating area (SOA), the invention calls for one or more auxiliary emitter zones (7), which have no external electrical contacts but are controlled by non-dissipative field-effect techniques, to be integrated with each other. The cathode-contacted emitter (6) extends over the whole cathode contact (10) and forms, together with the second base region (4, 5), a diode structure. When a control signal is sent to the integrated MOS-FET, the auxiliary emitter (7) and the integrated diode (4, 6) ensure that flooding of the component with charge carriers is intensified. The second base region can include a voltage pick-up zone (3). In this case, the first base region (2) is more highly doped than the voltage pick-up zone (3).

    POWER MOSFET WITH INTEGRATED GATE RESISTOR AND DIODE-CONNECTED MOSFET
    5.
    发明申请
    POWER MOSFET WITH INTEGRATED GATE RESISTOR AND DIODE-CONNECTED MOSFET 审中-公开
    具有集成栅极电阻和二极管连接MOSFET的功率MOSFET

    公开(公告)号:WO2013006703A2

    公开(公告)日:2013-01-10

    申请号:PCT/US2012045560

    申请日:2012-07-05

    Abstract: A power MOSFET (202) is formed in a semiconductor device (200) with a parallel combination of a shunt resistor (208) and a diode-connected MOSFET (210) between a gate input node (204) of the semiconductor device and a gate (206) of the power MOSFET. A gate (212) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. Source and drain nodes (216, 214) of the diode-connected MOSFET are connected to a source node (218) of the power MOSFET through diodes (220). The drain node of the diode-connected MOSFET is connected to the gate input node (204) of the semiconductor device. The source node(216) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. The power MOSFET and the diode-connected MOSFET are integrated into the substrate of the semiconductor device so that the diode- connected MOSFET source and drain nodes (216, 214) are electrically isolated from the power MOSFET source node (218) through a pn junction.

    Abstract translation: 在半导体器件(200)中,在半导体器件的栅极输入节点(204)和栅极(202)之间并联组合分流电阻器(208)和二极管连接的MOSFET(210)之间形成功率MOSFET(202) (206)的功率MOSFET。 二极管连接的MOSFET的栅极(212)连接到功率MOSFET的栅极(206)。 二极管连接的MOSFET的源极和漏极节点(216,214)通过二极管(220)连接到功率MOSFET的源节点(218)。 二极管连接的MOSFET的漏极节点连接到半导体器件的栅极输入节点(204)。 二极管连接的MOSFET的源极节点(216)连接到功率MOSFET的栅极(206)。 功率MOSFET和二极管连接的MOSFET集成到半导体器件的衬底中,使得二极管连接的MOSFET源极和漏极节点(216,214)通过pn结与功率MOSFET源节点(218)电隔离 。

    EMITTER-SWITCHED THYRISTOR
    6.
    发明申请
    EMITTER-SWITCHED THYRISTOR 审中-公开
    辐射源控晶闸管

    公开(公告)号:WO9812749A3

    公开(公告)日:1999-11-25

    申请号:PCT/EP9705165

    申请日:1997-09-20

    CPC classification number: H01L29/749 H01L29/7436 H01L29/7455

    Abstract: In an emitter-switched thyristor with a main thyristor (TH) composed of a p+ anode emitter (1), a drift zone (3') of opposite conductivity type, a zone (4) which has in the switched-off state a blocking zone with respect to zone (3) and an emitter zone (5) at the cathode side, again with an opposite conductivity type, so that a p+n-pn+ zone sequence results, a transistor structure (T) composed of the first three zones of alternating conductivity is provided in parallel thereto with an emitter (1), a base (3) and a collector (8). This structure contains a NMOSFET (M1) for directly driving the cathode emitters (5) through the cathode connection (KA). The source of this transistor is contacted by the cathode, as well as the collector zone (8) which forms the channel zone of the MOSFET at the surface of the semiconductor. The corresponding drain zone is connected to the n+ cathode emitter (5) of the main thyristor (TH) by an electric conductor (6). A switching-in DMOSFET (M2) is further provided whose gate (G2) is connected to the gate (G1) of the NMOSFET (M1), a source (S2) contacted by the cathode (K) and embedded in a p-base. A conductive connection is established with the cathode contact of the switching-in NMOSFET (M1), and the common connection extends up to a cathode connection (KA). A drain zone (D2) is embedded in the drift zone (3) and the substrate zones of M1 and M2 are in contact with the cathode. The structure contains a PMOSFET (M3) whose gate is connected to the cathode, whose drain (D3) forms a part of the collector zone (8) of the transistor (T) for the secondary current, whose source zone is connected to the base zone (4) of the main thyristor (TH) next to the cathode and whose substrate zone is formed by a part of the n-doped zone (3) adjacent to the surface of the component.

    Abstract translation: 在具有主闸流管(TH)的发射极控晶闸管,它由相反导电类型的p + -Anodenemitter(1),一个漂移区(3“)的,一个区(4),其具有相对于处于关闭状态的阻挡区的区域(3) 和阴极侧发射极区(5)被形成,又具有相反导电类型,以便一个区序列p +产生正的pn +是一个由交替的具有发射极导电性的第一三个区域这躺在并联的晶体管结构(T)(1)碱的(3 )和集电极(8)。 该结构包括用于阴极发射器(5)由阴极端子(KA),其特征在于,该晶体管的源极由阴极以及集电区接触的直接控制的NMOS(M1)(8)附接到所述半导体,沟道区的表面 的经由电导体的MOSFET形式,与相关联的漏区(6)被连接到主晶闸管(TH)的第n + -Kathodenemitter(5)。 此外,电源DMOSFET(M2)被提供,其栅极连接(G2)的NMOSFET(M1)的栅极(G1),源极(S2),它是由与阴极(K)接触,并在一个P- 被嵌入的基础上,其特征在于,与所述NMOSFET的阴极接触,用于切换(M1),以及到阴极端子(KA)的共同连接的导电连接被引导。 漏区(D2)被嵌入在漂移区(3),其中所述衬底区域由M1和M2与阴极接触。 该结构包括一个PMOSFET(M3),其栅极连接到所述阴极,且其漏极(D3)是集电极区的一部分(8)的晶体管(T)的次级流,它具有阴极附近的基极区的源极区(4)的主晶闸管( TH)连接,并且其衬底区是由邻近于所述设备的表面的n型掺杂区(3)的一部分而形成。

    FIELD-EFFECT-CONTROLLED SEMICONDUCTOR COMPONENT
    7.
    发明申请
    FIELD-EFFECT-CONTROLLED SEMICONDUCTOR COMPONENT 审中-公开
    FELDEFFEKTGESTEURTES半导体部件

    公开(公告)号:WO1994006158A1

    公开(公告)日:1994-03-17

    申请号:PCT/EP1993002216

    申请日:1993-08-19

    CPC classification number: H01L29/102 H01L29/7412 H01L29/7428 H01L29/7455

    Abstract: The invention concerns a field-effect-controlled semiconductor component with at least four zones of alternating opposite conduction types, an emitter region at the anode end, a first and a second base region adjacent to the emitter region, an emitter region at the cathode end and an additional adjacent emitter region, plus an anode contact, a contact with the emitter region at the cathode end and a MOS field-effect transistor control-electrode contact. The cathode-end emitter region and the adjacent emitter region form the source and drain of a MOS field-effect transistor. The part (34, 36) of the cathode-end base region which is adjacent to the emitter region (44) of a main thyristor, or a separate highly p-doped region (38) adjacent to the cathode-end base region, is connected to the cathode contact (72) by an integrated component (D) with a non-linear current/voltage characteristic.

    POWER MOSFET WITH INTEGRATED GATE RESISTOR AND DIODE-CONNECTED MOSFET

    公开(公告)号:WO2013006703A3

    公开(公告)日:2013-01-10

    申请号:PCT/US2012/045560

    申请日:2012-07-05

    Abstract: A power MOSFET (202) is formed in a semiconductor device (200) with a parallel combination of a shunt resistor (208) and a diode-connected MOSFET (210) between a gate input node (204) of the semiconductor device and a gate (206) of the power MOSFET. A gate (212) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. Source and drain nodes (216, 214) of the diode-connected MOSFET are connected to a source node (218) of the power MOSFET through diodes (220). The drain node of the diode-connected MOSFET is connected to the gate input node (204) of the semiconductor device. The source node(216) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. The power MOSFET and the diode-connected MOSFET are integrated into the substrate of the semiconductor device so that the diode- connected MOSFET source and drain nodes (216, 214) are electrically isolated from the power MOSFET source node (218) through a pn junction.

    MOSFET WITH GATE PULL-DOWN
    9.
    发明申请
    MOSFET WITH GATE PULL-DOWN 审中-公开
    MOSFET与门极拉低

    公开(公告)号:WO2011079194A2

    公开(公告)日:2011-06-30

    申请号:PCT/US2010/061784

    申请日:2010-12-22

    CPC classification number: H03K17/165 H03K17/687

    Abstract: A pull-down MOSFET (110) is coupled between a drain and gate of a MOSFET main switch transistor (102) in a switching type DC-to-DC power converter. A gate of the pull-down MOSFET (110) is coupled to the drain of the main switch transistor (102) by a capacitor 118 and is connected to a source of the main switch transistor (102) by a resistor (120). The pull-down MOSFET (110) is operated by capacitive coupling to the voltage drop across the main switch transistor (102) and can be used to hold the gate of the main switch transistor (102) at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor (102) by the Miller effect.

    Abstract translation: 下拉MOSFET(110)耦合在开关型DC-DC电力转换器中的MOSFET主开关晶体管(102)的漏极和栅极之间。 下拉MOSFET(110)的栅极通过电容器118耦合到主开关晶体管(102)的漏极,并通过电阻器(120)连接到主开关晶体管(102)的源极。 下拉MOSFET(110)通过与主开关晶体管(102)上的电压降的电容耦合来操作,并且可以用于将主开关晶体管(102)的栅极保持在其源极电位处或其附近,以避免或 减少主开关晶体管(102)的无意的接通由米勒效应。

    CONTROLLABLE SEMICONDUCTOR COMPONENT
    10.
    发明申请
    CONTROLLABLE SEMICONDUCTOR COMPONENT 审中-公开
    可控半导体元件

    公开(公告)号:WO1996009649A1

    公开(公告)日:1996-03-28

    申请号:PCT/EP1995003742

    申请日:1995-09-22

    CPC classification number: H01L29/0834 H01L29/747 H01L29/749

    Abstract: The invention concerns a semiconductor component which can be controlled on the anode side and whose semiconductor body comprises a plurality of adjacent, parallel-connected unit cells having a thyristor structure. A lightly doped n-base region (3) is adjoined on both sides by highly doped p-regions constituting p-base region (2) and p-emitter region (4). The p-base region (2) is followed by a highly doped n-emitter region (1) which contacts a cathode electrode (7). Integrated in the p-emitter region (4) is a first n-channel MOSFET (M1) which is connected in series with the thyristor structure by means of a floating electrode (FE). The drain electrode (5b) of the first MOSFET (M1) is provided with an outer anode (8) which has no contact with the p-emitter region (4). A second n-channel MOSFET (M2) is integrated between the n-base region (3) and the drain region (5b) of the first MOSFET (M1).

    Abstract translation: 具有晶闸管的阳极侧可控半导体元件,其半导体主体的本发明包括多个相邻布置的,并联连接的单元电池的,并且其中在两侧弱n型掺杂的基极区(3)高度掺杂的p型区作为p基极区(2 )和p-发射极区(4)邻近并且在p基极区(2)的高掺杂的n发射极区(1)如下,其与阴极电极(7)接触,并且,在p-发射极区(4) 的第一n沟道MOS场效应晶体管(M1)被集成,其中(FE)是由一个浮动电极串联连接的晶闸管,漏电极(5B)具有外阳极电极的第一MOSFET(M1)的( 8)被提供,其具有与p-发射极区没有接触(4)和(n基极区域(3之间)和第一MOS场效应晶体管的漏极区域5b)(M1),第二n沟道 MOS场效应晶体管(M2)integri ERT是。

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