Abstract:
A pull-down MOSFET (110) is coupled between a drain and gate of a MOSFET main switch transistor (102) in a switching type DC-to-DC power converter. A gate of the pull-down MOSFET (110) is coupled to the drain of the main switch transistor (102) by a capacitor 118 and is connected to a source of the main switch transistor (102) by a resistor (120). The pull-down MOSFET (110) is operated by capacitive coupling to the voltage drop across the main switch transistor (102) and can be used to hold the gate of the main switch transistor (102) at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor (102) by the Miller effect.
Abstract:
Technique for reducing local oscillator leakage in integrated frequency conversion circuits. The technique includes the step of coupling an external portion (35) of a resonator circuit (31, 35) to the integrated frequency conversion circuit (200). The coupling is accomplished without using any of the DC power or ground pins of the conversion circuit. A frequency conversion circuit based on this technique includes resonator, oscillator, and mixer circuits. Part of the oscillator and mixer circuit (16, 13) is encapsulated in a package (200), whereas at least a portion of the resonator circuit (35) is located outside the package. The outside portion of the resonator circuit (35) connects to at least two external resonator pins (43a, 43b) of the package (200) such that, during the operating of the conversion circuit, the net current entering the package via said external resonator pins (43a, 43b) is approximately zero.
Abstract:
A packaged power transistor device (100) having a leadframe including a flat plate (110) and a coplanar flat strip (120) spaced from the plate, the plate having a first thickness (110a) and the strip having a second thickness (120a) smaller than the first thickness, the plate and the strip having terminals (212; 121a). A field-effect power transistor chip (210) having a third thickness (210a), a first and a second contact pad on one chip side, and a third contact pad (211) on the opposite chip side, the first pad being attached to the plate, the second pad being attached to the strip, and the third pad being coplanar with the terminals. Encapsulation compound (130) filling the thickness difference between plate and strip, and spaces between chip and terminals, wherein the compound has a surface (101) coplanar with the plate surface (111) and the opposite surface (102) coplanar with the third pad (211) and the terminals (212; 212a), the distance (104) between the surfaces being equal to the sum of the first (110a) and third (210a) thicknesses.
Abstract:
A high frequency power supply module (800) of a synchronous Buck converter having the control die (810) directly soldered drain-down to the pad (801) of a leadframe; pad (801) is connected to VIN and the VIN connection to control die (810) exhibits vanishing impedance and inductance, thus reducing the amplitude and duration of switch node voltage ringing by more than 90 %. Consequently, the input current enters the control die terminal vertically from the pad. The switch node clip (840), topping the control die (810), is designed with an area large enough to place the sync die (820) drain-down on top of the control die; the current continues to flow vertically through the converter stack. The active area of the sync die is equal to or greater than the active area of the control die; the physical area of the sync die is equal to or greater than the physical area of the control die. The source terminal of sync die (820) is connected to ground by clip (860) designed to act as a heat spreader.
Abstract:
A high frequency power supply module (800) of a synchronous Buck converter having the control die (810) directly soldered drain-down to the pad (801) of a leadframe; pad (801) is connected to V IN and the V IN connection to control die (810) exhibits vanishing impedance and inductance, thus reducing the amplitude and duration of switch node voltage ringing by more than 90 %. Consequently, the input current enters the control die terminal vertically from the pad. The switch node clip (840), topping the control die (810), is designed with an area large enough to place the sync die (820) drain-down on top of the control die; the current continues to flow vertically through the converter stack. The active area of the sync die is equal to or greater than the active area of the control die; the physical area of the sync die is equal to or greater than the physical area of the control die. The source terminal of sync die (820) is connected to ground by clip (860) designed to act as a heat spreader.
Abstract:
A packaged power transistor device (100) having a leadframe including a flat plate (110) and a coplanar flat strip (120) spaced from the plate, the plate having a first thickness (110a) and the strip having a second thickness (120a) smaller than the first thickness, the plate and the strip having terminals (212; 121a). A field-effect power transistor chip (210) having a third thickness (210a), a first and a second contact pad on one chip side, and a third contact pad (211) on the opposite chip side, the first pad being attached to the plate, the second pad being attached to the strip, and the third pad being coplanar with the terminals. Encapsulation compound (130) filling the thickness difference between plate and strip, and spaces between chip and terminals, wherein the compound has a surface (101) coplanar with the plate surface (111) and the opposite surface (102) coplanar with the third pad (211) and the terminals (212; 212a), the distance (104) between the surfaces being equal to the sum of the first (110a) and third (210a) thicknesses.
Abstract:
A pull-down MOSFET (110) is coupled between a drain and gate of a MOSFET main switch transistor (102) in a switching type DC-to-DC power converter. A gate of the pull-down MOSFET (110) is coupled to the drain of the main switch transistor (102) by a capacitor 118 and is connected to a source of the main switch transistor (102) by a resistor (120). The pull-down MOSFET (110) is operated by capacitive coupling to the voltage drop across the main switch transistor (102) and can be used to hold the gate of the main switch transistor (102) at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor (102) by the Miller effect.