METHOD OF WAFER-LEVEL HERMETIC PACKAGING WITH VERTICAL FEEDTHROUGHS
    1.
    发明申请
    METHOD OF WAFER-LEVEL HERMETIC PACKAGING WITH VERTICAL FEEDTHROUGHS 审中-公开
    具有垂直进给的水平包裹方法

    公开(公告)号:WO2015038078A1

    公开(公告)日:2015-03-19

    申请号:PCT/TR2013/000298

    申请日:2013-09-11

    Abstract: A wafer-level packaging method for MEMS structures that are desired to be encapsulated in a hermetic cavity and that need the transfer of at least a single or multiple electrical leads to the outside of the cavity without destroying the hermeticity of the cavity. Lead transfer is achieved using vertical feedthroughs that are patterned on the capping substrate within the same fabrication step to produce the encapsulating cavity. Furthermore, the structure of the vertical feedthroughs and via openings to reach these feedthroughs are arranged in such a way that conventional wirebonding would be sufficient to connect the vertical feedthroughs to the outer world, without a need for conductor-refill inside the via openings. The method is compatible with low-temperature thermocompression-based bonding/sealing processes using various sealing materials such as thin- film metals and alloys, and also with the silicon-glass anodic or silicon-silicon fusion bonding processes.

    Abstract translation: 用于MEMS结构的晶片级封装方法,其希望被封装在密封腔中,并且需要将至少一个或多个电引线传送到腔的外部,而不破坏腔的气密性。 使用在相同制造步骤中的封盖基板上图案化的垂直馈通来实现引线转移以产生封装腔。 此外,到达这些馈通的垂直馈通和通孔的结构被布置成使得常规的引线键合足以将垂直馈通连接到外部世界,而不需要在通孔开口内部进行导体再填充。 该方法与使用各种密封材料如薄膜金属和合金以及硅玻璃阳极或硅 - 硅熔合工艺的低温热压基接合/密封工艺兼容。

    HERMETIC PACKAGING METHOD FOR SOI-MEMS DEVICES WITH EMBEDDED VERTICAL FEEDTHROUGHS
    2.
    发明申请
    HERMETIC PACKAGING METHOD FOR SOI-MEMS DEVICES WITH EMBEDDED VERTICAL FEEDTHROUGHS 审中-公开
    具有嵌入式垂直馈电的SOI-MEMS器件的包封方法

    公开(公告)号:WO2016200346A1

    公开(公告)日:2016-12-15

    申请号:PCT/TR2015/050001

    申请日:2015-06-08

    Abstract: A wafer-level packaging method for SOI-MEMS structures that are desired to be encapsulated in a hermetic cavity with electrical leads to the outside without destroying the hermeticity of the cavity. The MEMS devices and vertical feedthroughs are both fabricated on the same SOI wafer, whereas a glass or silicon wafer is used for capping and routing metallization. The method requires at most five process masks and a single SOI wafer. Compared to the existing packaging technologies it reduces the number of wafers, process masks, and process steps. Conventional wirebonding is sufficient to connect the vertical feedthroughs to the outer world, without a need for conductor-refill inside the via openings. The method is compatible with low-temperature thermo-compression-based bonding/sealing processes and also with the silicon-glass anodic or silicon-silicon fusion bonding processes, which do not require any sealing material for bonding/sealing. The simplified process increase the reliability and yield in addition to lowering the manufacturing costs of hermetically-sealed MEMS components with the present invention.

    Abstract translation: 用于SOI-MEMS结构的晶片级封装方法,其希望被封装在具有电气的密封腔中,导致外部而不破坏腔的气密性。 MEMS器件和垂直馈通均在相同的SOI晶片上制造,而玻璃或硅晶片用于封盖和布线金属化。 该方法需要至多五个处理掩模和单个SOI晶片。 与现有的封装技术相比,它减少了晶片数量,处理掩模和工艺步骤。 常规的引线键合足以将垂直馈通连接到外部世界,而不需要在通孔开口内部进行导体再填充。 该方法与低温热压基接合/密封工艺兼容,也可与不需要任何密封材料进行粘合/密封的硅玻璃阳极或硅 - 硅熔接工艺兼容。 除了降低本发明的密封的MEMS部件的制造成本之外,简化的工艺增加了可靠性和产量。

    MICROFLUIDIC CHANNEL INTEGRATED MICROWAVE MEMS BIOSENSOR
    3.
    发明申请
    MICROFLUIDIC CHANNEL INTEGRATED MICROWAVE MEMS BIOSENSOR 审中-公开
    微流控通道微波生物传感器

    公开(公告)号:WO2017030512A1

    公开(公告)日:2017-02-23

    申请号:PCT/TR2015/050072

    申请日:2015-08-18

    CPC classification number: G01N27/227 G01N27/3276

    Abstract: This invention relates to a robust, microwave biosensor fabricated using MEMS fabrication techniques for highly sensitive and selective, rapid, label-free detection of biological or chemical substances. The biosensor subjected to this invention can be used for In-vitro, Point-of-care diagnostics which can have wide range of applications covering environmental monitoring, drug-discovery, disease diagnosis etc.

    Abstract translation: 本发明涉及使用MEMS制造技术制造的强大的微波生物传感器,用于高灵敏度和选择性,快速,无标签的生物或化学物质的检测。 经过本发明的生物传感器可用于体外,护理点诊断,可广泛应用于环境监测,药物发现,疾病诊断等领域。

    METHOD OF ENERGY HARVESTING USING BUILT-IN POTENTIAL DIFFERENCE OF METAL-TO-METAL JUNCTIONS AND DEVICE THEREOF
    4.
    发明申请
    METHOD OF ENERGY HARVESTING USING BUILT-IN POTENTIAL DIFFERENCE OF METAL-TO-METAL JUNCTIONS AND DEVICE THEREOF 审中-公开
    使用金属至金属结的内在潜在差异的能量收集方法及其装置

    公开(公告)号:WO2013115733A1

    公开(公告)日:2013-08-08

    申请号:PCT/TR2012/000024

    申请日:2012-02-01

    CPC classification number: H02N1/00 H02N1/08

    Abstract: This invention is related with electrical energy conversion device, which uses built-in potential of metal-to-metal junctions from repeating movements with random frequencies, speeds and amplitudes at the medium of the device. The device using the method does not rely on a resonant frequency, besides, it can convert the kinetic energy to electrical energy even at low frequencies. Furthermore, its application to the real life situations is economic and beneficial because of the efficient working principle and simple structure. Unique design of the device enables direct wiring of the outputs of identical or similar devices together for the purpose of power scaling without the need of using another device, which may cause energy losses and increase the total cost. This device also does not require a dummy voltage source or a precharge at the beginning of energy harvesting since it makes use of the built-in potential difference of different metals used in shuttle and electrodes of the device.

    Abstract translation: 本发明涉及电能转换装置,该电能转换装置利用内置的金属 - 金属结的电位,在装置的介质上以随机频率,速度和振幅重复运动。 使用该方法的装置不依赖于谐振频率,此外,即使在低频下也可以将动能转换成电能。 而且,由于工作原理高效,结构简单,对现实生活中的应用具有经济效益。 该设备的独特设计可以将相同或类似设备的输出端直接连接在一起,以实现功率调节,而不需要使用另一个可能导致能量损失并增加总成本的设备。 该装置在能量采集开始时也不需要虚拟电压源或预充电,因为它利用了装置中穿梭和电极中使用的不同金属的内置电位差。

    ULTRA LOW-COST UNCOOLED INFRARED DETECTOR ARRAYS IN CMOS
    5.
    发明申请
    ULTRA LOW-COST UNCOOLED INFRARED DETECTOR ARRAYS IN CMOS 审中-公开
    CMOS超低成本红外探测器阵列

    公开(公告)号:WO2005098380A1

    公开(公告)日:2005-10-20

    申请号:PCT/EP2005/051529

    申请日:2005-04-06

    CPC classification number: G01J5/20 H01L27/14603 H01L27/1463 H01L27/14649

    Abstract: Micromachined, CMOS p+-active/n-well diodes are used as infrared sensing elements in uncooled Focal Plane Arrays (FPA). The FPAs are fabricated using a standard CMOS process followed by post-CMOS bulk-micromachining steps without any critical lithography or complicated deposition processes. Micromachining steps include Reactive Ion Etching (RIE) to reach the bulk silicon and anisotropic silicon wet etching together with electrochemical etch-stop technique to obtain thermally isolated p+-active/n-well diodes. The FPAs are monolithically integrated with their readout circuit since they are fabricated in any standard CMOS technology.

    Abstract translation: 微加工的CMOS p +主动/ n阱二极管被用作非制冷焦平面阵列(FPA)中的红外感测元件。 FPA使用标准CMOS工艺制造,随后是后CMOS体积微加工步骤,无需任何临界光刻或复杂的沉积工艺。 微加工步骤包括反应离子蚀刻(RIE),以与电化学蚀刻停止技术一起达到体硅和各向异性硅湿蚀刻,以获得热隔离的p + - 活性/ n-阱二极管。 FPAs与其读出电路单片集成,因为它们采用任何标准CMOS技术制造。

    A THREE AXIS CAPACITIVE MEMS ACCELEROMETER ON A SINGLE SUBSTRATE
    6.
    发明申请
    A THREE AXIS CAPACITIVE MEMS ACCELEROMETER ON A SINGLE SUBSTRATE 审中-公开
    单轴基座上的三轴电容式MEMS加速度计

    公开(公告)号:WO2016108770A1

    公开(公告)日:2016-07-07

    申请号:PCT/TR2014/000531

    申请日:2014-12-31

    Abstract: The invention relates to a three axis capacitive mems accelerometer on a single substrate. In this invention a varying gap differential capacitive sensing three-axis accelerometer using SOI on glass process is introduced. The out of plane axis accelerometer which is developed in the present invention can be used for fabrication of either a three axis accelerometer with a single proof mass or an individual single axis accelerometers on the same substrate. Additionally the out of plane axis accelerometer which is developed in the present invention, the handle layer of the SOI wafer is used as packaging layer.

    Abstract translation: 本发明涉及单个基板上的三轴电容式加速度计。 在本发明中,引入了使用SOI在玻璃工艺上的变化的差动电容式感测三轴加速度计。 在本发明中开发的平面轴加速度计可用于在同一基板上制造具有单个检验质量的三轴加速度计或单个单轴加速度计。 另外,在本发明中开发的平面轴加速度计外,SOI晶片的手柄层用作包装层。

    UNCOOLED INFRARED DETECTOR AND METHODS FOR MANUFACTURING THE SAME
    8.
    发明申请
    UNCOOLED INFRARED DETECTOR AND METHODS FOR MANUFACTURING THE SAME 审中-公开
    未经处理的红外探测器及其制造方法

    公开(公告)号:WO2011130284A2

    公开(公告)日:2011-10-20

    申请号:PCT/US2011/032136

    申请日:2011-04-12

    Abstract: This disclosure discusses various methods for manufacturing uncooled infrared detectors by using foundry-defined silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) wafers, each of which may include a substrate layer, an insulation layer having a pixel region and a wall region surrounding the pixel region, a pixel structure formed on the pixel region of the insulation layer, a wall structure formed adjacent to the pixel structure and on the wall region of the insulation layer, a dielectric layer covering the pixel structure and the wall structure, a pixel mask formed within the dielectric layer and for protecting the pixel structure during a dry etching process, and a wall mask formed within the dielectric layer and for protecting the wall structure during the dry etching process, thereby releasing a space defined between the wall structure and the pixel structure after the dry etching process.

    Abstract translation: 本公开内容讨论了通过使用铸造中限定的绝缘体上硅(SOI)互补金属氧化物半导体(CMOS)晶片来制造未经制造的红外检测器的各种方法,每个晶片可以包括基板层,具有像素区域的绝缘层和 围绕像素区域的壁区域,形成在绝缘层的像素区域上的像素结构,邻近像素结构形成的壁结构和绝缘层的壁区域,覆盖像素结构和壁结构的介电层 形成在电介质层内并用于在干蚀刻工艺期间保护像素结构的像素掩模,以及形成在电介质层内的壁掩模,并且用于在干蚀刻工艺期间保护壁结构,由此释放在壁之间限定的空间 结构和干蚀刻工艺后的像素结构。

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