公开(公告)号：WO2023075966A1

公开(公告)日：2023-05-04

申请号：PCT/US2022/044855

申请日：2022-09-27

Applicant: APPLIED MATERIALS, INC.

Inventor： LIKHANSKII, Alexandre ,  HAYES, Alan V. ,  LUBOMIRSKY, Dmitry

IPC: H01J27/02 ,  H01J37/08

Abstract: An ion extraction assembly for an ion source is provided. The ion extraction assembly may include a plurality of electrodes, wherein the plurality of electrodes comprises: a plasma-facing electrode, arranged for coupling to a plasma chamber; and a substrate-facing electrode, disposed outside of the plasma-facing electrode. The at least one electrode of the plurality of electrodes may include a grid structure, defining a plurality of holes, wherein the at least one electrode has a non-uniform thickness, wherein a first grid thickness in a middle region of the at least one electrode is different than a second grid thickness, in an outer region of the at least one electrode.

公开(公告)号：WO2022173655A1

公开(公告)日：2022-08-18

申请号：PCT/US2022/015146

申请日：2022-02-03

Applicant: APPLIED MATERIALS, INC.

Inventor： BUCHBERGER, JR., Douglas A. ,  LUBOMIRSKY, Dmitry ,  DUKOVIC, John O. ,  NEMANI, Srinivas D.

IPC: G03F7/38 ,  H01L21/67 ,  H01L21/687 ,  G03F7/20

Abstract: A method and apparatus for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes is provided herein. Each of the methods and apparatus include an electrode assembly and a base assembly which are configured to seal together and form a process volume. The electrode assembly includes a permeable electrode, The base assembly is configured to support a substrate and heat the substrate during a post- exposure bake operation. One or more process fluid channels are configured to fill the process volume with a process fluid. The electrode assembly is configured to apply an electric field to the substrate disposed within the process volume during the pose-exposure bake operation.

公开(公告)号：WO2022060665A1

公开(公告)日：2022-03-24

申请号：PCT/US2021/050040

申请日：2021-09-13

Applicant: APPLIED MATERIALS, INC.

Inventor： SUBRAMANYA, Samartha ,  LUBOMIRSKY, Dmitry ,  SAMIR, Mehmet Tugrul ,  ZHU, Lala ,  CHOY, Martin Y. ,  NGUYEN, Son T. ,  GOPAL, Pranav

IPC: H01J37/32

Abstract: Exemplary semiconductor processing chambers may include showerhead. The chambers may include a pedestal configured to support a semiconductor substrate, where the showerhead and pedestal at least partially define a processing region within the semiconductor chamber. The chamber may include a spacer characterized by a first surface in contact with the showerhead and a second surface opposite the first surface. The chamber may include a pumping liner characterized by a first surface in contact with the spacer and a second surface opposite the first surface. The pumping liner may define a plurality of apertures within the first surface of the pumping liner.

公开(公告)号：WO2019018019A2

公开(公告)日：2019-01-24

申请号：PCT/US2018/026812

申请日：2018-04-10

Applicant: APPLIED MATERIALS, INC.

Inventor： CHO, Tae Seung ,  PARK, Soonam ,  KIM, Junghoon ,  LUBOMIRSKY, Dmitry ,  VENKATARAMAN, Shankar

IPC: H01L21/66 ,  G01N21/73 ,  H01L21/3065 ,  H01L21/67 ,  H01J37/32

Abstract: Methods and systems for etching substrates using a remote plasma are described. Remotely excited etchants are formed in a remote plasma and flowed through a showerhead into a substrate processing region to etch the substrate. Optical emission spectra are acquired from the substrate processing region just above the substrate. The optical emission spectra may be used to determine an endpoint of the etch, determine the etch rate or otherwise characterize the etch process. A weak plasma may be present in the substrate processing region. The weak plasma may have much lower intensity than the remote plasma. In cases where no bias plasma is used above the substrate in an etch process, a weak plasma may be ignited near a viewport disposed near the side of the substrate processing region to characterize the etchants.

公开(公告)号：WO2017201309A1

公开(公告)日：2017-11-23

申请号：PCT/US2017/033367

申请日：2017-05-18

Applicant: APPLIED MATERIALS, INC.

Inventor： TAN, Tien Fak ,  LOH, Lok Kee ,  LUBOMIRSKY, Dmitry ,  JUNG, Soonwook ,  CHOY, Martin Yue ,  PARK, Soonam

IPC: H01L21/3065 ,  H01L21/683 ,  H05H1/46 ,  H01L21/687

Abstract: A semiconductor systems and methods may include a semiconductor processing chamber having a gas box providing access to the semiconductor processing chamber. The chamber may include a first annular support contacting the gas box at a first surface of the first annular support, wherein the first annular support and the gas box each define a portion of a first channel located at the interface of the gas box and the first annular support; and a first gas distribution plate seated within the first channel. The chamber may also include a second annular support contacting the first annular support at a second surface of the first annular support opposite the first surface of the first annular support, wherein the second annular support at least partially defines a second channel located about an interior region of the semiconductor processing chamber; and a second gas distribution plate seated within the second channel, wherein the first gas distribution plate and the second gas distribution plate comprise quartz.

Abstract translation: 半导体系统和方法可以包括半导体处理腔室，该半导体处理腔室具有提供对半导体处理腔室的入口的气体箱。 所述腔室可以包括在所述第一环形支撑件的第一表面处接触所述气箱的第一环形支撑件，其中所述第一环形支撑件和所述气箱各自限定位于所述气箱与所述第一环形支撑件的界面处的第一通道的一部分， 环形支撑; 以及位于第一通道内的第一气体分配板。 腔室还可包括第二环形支撑件，该第二环形支撑件在第一环形支撑件的与第一环形支撑件的第一表面相对的第二表面处接触第一环形支撑件，其中第二环形支撑件至少部分地限定第二通道，该第二通道位于内部区域 的半导体处理室; 和位于第二通道内的第二气体分配板，其中第一气体分配板和第二气体分配板包括石英。

公开(公告)号：WO2017024127A1

公开(公告)日：2017-02-09

申请号：PCT/US2016/045543

申请日：2016-08-04

Applicant: APPLIED MATERIALS, INC.

Inventor： BENJAMINSON, David ,  LUBOMIRSKY, Dmitry ,  MATH, Ananda Seelavanth ,  NATARAJAN, Saravanakumar ,  CHOUREY, Shubham

IPC: H01L21/687 ,  H01L21/324 ,  H01L21/67

CPC classification number: H01L21/68785 ,  H01L21/324 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/67248 ,  H01L22/12

Abstract: A workpiece holder includes a puck, first and second heating devices in thermal communication with respective inner and outer portions of the puck, and a thermal sink in thermal communication with the puck. The first and second heating devices are independently controllable, and the first and second heating devices are in greater thermal communication with the puck, than thermal communication of the thermal sink with the puck. A method of controlling temperature distribution of a workpiece includes flowing a heat exchange fluid through a thermal sink to establish a reference temperature to a puck, raising temperatures of radially inner and outer portions of the puck to first and second temperatures greater than the reference temperature, by activating respective first and second heating devices disposed in thermal communication with the radially inner and outer portions of the puck, and placing the workpiece on the puck.

Abstract translation: 工件保持器包括与圆盘相应的内部和外部部分热连通的圆盘，第一和第二加热装置以及与该冰球热连通的散热器。 第一和第二加热装置是可独立控制的，并且第一和第二加热装置与冰球的热连通比热盘与冰球热传递更大。 一种控制工件温度分布的方法包括使热交换流体流过散热器，以建立对圆盘的参考温度，将圆盘的径向内部和外部部分的温度升高到高于参考温度的第一和第二温度， 通过激活被设置成与圆盘的径向内部和外部热连通的相应的第一和第二加热装置，并将工件放置在冰球上。

公开(公告)号：WO2015127467A1

公开(公告)日：2015-08-27

申请号：PCT/US2015/017368

申请日：2015-02-24

Applicant: APPLIED MATERIALS, INC.

Inventor： KOBAYASHI, Satoru ,  ZHU, Yufei ,  GARG, Saurabh ,  PARK, Soonam ,  LUBOMIRSKY, Dmitry

IPC: G01R31/26 ,  G01R27/26

CPC classification number: G01N22/00

Abstract: A test device for testing an electrical property of a chamber component, such as a ceramic ring, includes an outer conductor and an inner conductor disposed within and electrically isolated from the outer conductor. The outer conductor has a base, a top, and an interior sidewall disposed between the base and the top. The inner conductor has a top portion having a first diameter and a bottom portion having a second diameter, in which the second diameter is greater than the first diameter. A sample area is defined between the base of the outer conductor and the bottom portion of the inner conductor, and is configured to receive a chamber component. The electrical property of the chamber component and wherein an electrical property of the chamber component is measurable based on application of a signal to at least one of the outer conductor or the inner conductor.

Abstract translation: 用于测试诸如陶瓷环的室部件的电性能的测试装置包括外导体和设置在外导体内并与外导体电隔离的内导体。 外部导体具有设置在基部和顶部之间的基部，顶部和内部侧壁。 内导体具有具有第一直径的顶部部分和具有第二直径的底部部分，其中第二直径大于第一直径部分。 样品区域被限定在外部导体的底部和内部导体的底部之间，并被构造成容纳腔室部件。 基于向至少一个外部导体或内部导体施加信号，可以测量室部件的电性能，并且其中室部件的电特性是可测量的。

公开(公告)号：WO2015069428A1

公开(公告)日：2015-05-14

申请号：PCT/US2014/060768

申请日：2014-10-15

Applicant: APPLIED MATERIALS, INC.

Inventor： BAEK, Jonghoon ,  PARK, Soonam ,  CHEN, Xinglong ,  LUBOMIRSKY, Dmitry

IPC: H01L21/02

CPC classification number: H01J37/32082 ,  C23C16/4401 ,  C23C16/4404 ,  C23C16/503 ,  C23C16/509 ,  C23C16/52 ,  H01J37/32091 ,  H01J37/32146 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32568 ,  H01J37/32697 ,  H01J2237/334

Abstract: Embodiments of the present disclosure generally relate to an apparatus and method for reducing particle generation in a processing chamber. In one embodiment, the methods generally includes generating a plasma between a powered top electrode and a grounded bottom electrode, wherein the top electrode is parallel to the bottom electrode, and applying a constant zero DC bias voltage to the powered top electrode during a film deposition process to minimize the electrical potential difference between the powered top electrode and the plasma and/or the electrical potential difference between the grounded bottom electrode and the plasma. Minimizing the electrical potential difference between the plasma and the electrodes reduces particle generation because the acceleration of the ions in the sheath region of the electrodes is reduced and the collision force of the ions with the protective coating layer on the electrodes is minimized. Therefore, particle generation on the substrate surface is reduced.

Abstract translation: 本公开的实施例一般涉及用于减少处理室中的颗粒产生的装置和方法。 在一个实施例中，所述方法通常包括在动力顶部电极和接地底部电极之间产生等离子体，其中顶部电极平行于底部电极，并且在膜沉积期间向动力顶部电极施加恒定的零直流偏置电压 以最小化上电极和等离子体之间的电位差和/或接地的底部电极和等离子体之间的电位差的过程。 使等离子体和电极之间的电位差最小化减少了由于电极的鞘区域中的离子的加速度降低并且电极上的保护涂层的离子的碰撞力最小化的颗粒产生。 因此，衬底表面上的颗粒产生减少。

公开(公告)号：WO2015023493A1

公开(公告)日：2015-02-19

申请号：PCT/US2014/050008

申请日：2014-08-06

Applicant: APPLIED MATERIALS, INC.

Inventor： LUBOMIRSKY, Dmitry ,  LIANG, Qiwei

IPC: H01L21/56 ,  H01L21/02

CPC classification number: H01J37/32816 ,  H01J37/32513 ,  Y10T428/24479

Abstract: In one embodiment, a surface having a sealing groove formed therein. The sealing groove is configured to accept an elastomeric seal. The sealing groove includes a first portion having a full dovetail profile and at least on a second portion having a half dovetail profile.

Abstract translation: 在一个实施例中，其中形成有密封槽的表面。 密封槽构造成接受弹性体密封。 密封槽包括具有完整的燕尾形轮廓的第一部分，并且至少在具有半个燕尾形轮廓的第二部分上。

公开(公告)号：WO2014137658A1

公开(公告)日：2014-09-12

申请号：PCT/US2014/018181

申请日：2014-02-25

Applicant: APPLIED MATERIALS, INC.

Inventor： WANG, Xikun ,  WANG, Anchuan ,  INGLE, Nitin K. ,  LUBOMIRSKY, Dmitry

IPC: H01L21/3065

CPC classification number: H01L21/32136 ,  H01J37/32357 ,  H01J37/3244 ,  H01L21/02068 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/4814

Abstract: Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal oxides lacking in titanium and/or silicon-containing films (e.g. silicon oxide, silicon carbon nitride and low-K dielectric films). The methods include a remote plasma etch formed from a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride. The plasma effluents react with exposed surfaces and selectively remove titanium nitride while very slowly removing the other exposed materials. The substrate processing region may also contain a plasma to facilitate breaking through any titanium oxide layer present on the titanium nitride. The plasma in the substrate processing region may be gently biased relative to the substrate to enhance removal rate of the titanium oxide layer.

Abstract translation: 本文描述了相对于电介质膜选择性地蚀刻氮化钛的方法，其可以包括例如不含钛和/或含硅膜的替代金属和金属氧化物（例如氧化硅，氮化碳和低K电介质膜 ）。 该方法包括由含氯前体形成的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与氮化钛反应。 等离子体流出物与暴露的表面反应，并选择性地除去氮化钛，同时非常缓慢地除去其它暴露的材料。 衬底处理区域还可以包含等离子体以便于破坏存在于氮化钛上的任何氧化钛层。 衬底处理区域中的等离子体可以相对于衬底轻轻地偏置，以提高氧化钛层的去除速率。