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公开(公告)号：WO2018125243A1
公开(公告)日：2018-07-05
申请号：PCT/US2016/069625
申请日：2016-12-30
Applicant: INTEL CORPORATION
Inventor： RAHMAN, MD Tofizur , WIEGAND, Christopher J. , MAERTZ, Brian , OUELLETTE, Daniel G. , OGUZ, Kaan , O'BRIEN, Kevin P. , DOYLE, Brian S. , DOCZY, Mark L. , BERGSTROM, Daniel B. , GHANI, Tahir , GOLONZKA, Oleg , BROCKMAN, Justin S.
Abstract: In various embodiments, the systems, methods, and apparatus disclosed herein are directed to reducing the effects of damping, for example, Gilbert damping, in perpendicular magnetic tunnel junction (pMTJ) devices, while maintaining the tunnel magnetoresistance (TMR) and/or the resistance area (RA) product of the pMTJ devices. In one embodiment, the Gilbert damping can be directly proportional to the switching current in pMTJ devices. Accordingly, because the systems, methods, and apparatus can reduce the Gilbert damping, the switching current can also be reduced the pMTJ devices. In one embodiment, a pMTJ device is disclosed, the device comprising a free layer that includes a multilayer including a first ferromagnetic layer, a non-magnetic oxide layer (for example, a metal oxide layer), and a second ferromagnetic layer can have a reduced spin pumping.
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2.发明申请
公开(公告)号：WO2018125204A9
公开(公告)日：2018-07-05
申请号：PCT/US2016/069473
申请日：2016-12-30
Applicant: INTEL CORPORATION
Inventor： RAHMAN, MD Tofizur , WIEGAND, Christopher J. , OGUZ, Kaan , BROCKMAN, Justin S. , OUELLETTE, Daniel G. , MAERTZ, Brian , O'BRIEN, Kevin P. , DOCZY, Mark L. , DOYLE, Brian S. , GOLONZKA, Oleg , GHANI, Tahir
Abstract: A material layer stack for a pSTTM memory device includes a magnetic tunnel junction (MTJ) stack, a oxide layer, a protective layer and a capping layer. The MTJ includes a fixed magnetic layer, a tunnel barrier disposed above the fixed magnetic layer and a free magnetic layer disposed on the tunnel barrier. The oxide layer, which enables an increase in perpendicularity of the pSTTM material layer stack, is disposed on the free magnetic layer. The protective layer is disposed on the oxide layer, and acts as a protective barrier to the oxide from physical sputter damage during subsequent layer deposition. A conductive capping layer with a low oxygen affinity is disposed on the protective layer to reduce iron-oxygen de-hybridization at the interface between the free magnetic layer and the oxide layer. The inherent non-oxygen scavenging nature of the conductive capping layer enhances stability and reduces retention loss in pSTTM devices.
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3.发明申请
公开(公告)号：WO2018125204A1
公开(公告)日：2018-07-05
申请号：PCT/US2016/069473
申请日：2016-12-30
Applicant: INTEL CORPORATION
Inventor： RAHMAN, MD Tofizur , WIEGAND, Christopher J. , OGUZ, Kaan , BROCKMAN, Justin S. , OUELLETTE, Daniel G. , MAERTZ, Brian , O'BRIEN, Kevin P. , DOCZY, Mark L. , DOYLE, Brian S. , GOLONZKA, Oleg , GHANI, Tahir
Abstract: A material layer stack for a pSTTM memory device includes a magnetic tunnel junction (MTJ) stack, a oxide layer, a protective layer and a capping layer. The MTJ includes a fixed magnetic layer, a tunnel barrier disposed above the fixed magnetic layer and a free magnetic layer disposed on the tunnel barrier. The oxide layer, which enables an increase in perpendicularity of the pSTTM material layer stack, is disposed on the free magnetic layer. The protective layer is disposed on the oxide layer, and acts as a protective barrier to the oxide from physical sputter damage during subsequent layer deposition. A conductive capping layer with a low oxygen affinity is disposed on the protective layer to reduce iron-oxygen de-hybridization at the interface between the free magnetic layer and the oxide layer. The inherent non-oxygen scavenging nature of the conductive capping layer enhances stability and reduces retention loss in pSTTM devices.
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4.发明申请DEVICE, SYSTEM AND METHOD FOR IMPROVED MAGNETIC ANISOTROPY OF A MAGNETIC TUNNEL JUNCTION 审中-公开改善磁隧道结的磁各向异性的装置，系统和方法
公开(公告)号：WO2018004698A1
公开(公告)日：2018-01-04
申请号：PCT/US2016/040875
申请日：2016-07-01
Applicant: INTEL CORPORATION , RAHMAN, MD Tofizur , WIEGAND, Christopher J. , MAERTZ, Brian , OUELLETTE, Daniel G. , O'BRIEN, Kevin P. , OGUZ, Kaan , DOYLE, Brian S. , DOCZY, Mark L. , BERGSTROM, Daniel B. , BROCKMAN, Justin S. , GOLONZKA, Oleg , GHANI, Tahir
Inventor： RAHMAN, MD Tofizur , WIEGAND, Christopher J. , MAERTZ, Brian , OUELLETTE, Daniel G. , O'BRIEN, Kevin P. , OGUZ, Kaan , DOYLE, Brian S. , DOCZY, Mark L. , BERGSTROM, Daniel B. , BROCKMAN, Justin S. , GOLONZKA, Oleg , GHANI, Tahir
CPC classification number: H01L43/12 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
Abstract: Material layer stack structures to provide a magnetic tunnel junction (MTJ) having improved perpendicular magnetic anisotropy (PMA) characteristics. In an embodiment, a free magnetic layer of the material layer stack is disposed between a tunnel barrier layer and a cap layer of magnesium oxide (Mg). The free magnetic layer includes a Cobalt-Iron-Boron (CoFeB) body substantially comprised of a combination of Cobalt atoms, Iron atoms and Boron atoms. A first Boron mass fraction of the CoFeB body is equal to or more than 25% (e.g., equal to or more than 27%) in a first region which adjoins an interface of the free magnetic layer with the tunnel barrier layer. In another embodiment, the first Boron mass fraction is more than a second Boron mass fraction in a second region of the CoFeB body which adjoins an interface of the free magnetic layer with the cap layer.
Abstract translation: 材料层堆叠结构提供具有改善的垂直磁各向异性（PMA）特性的磁性隧道结（MTJ）。 在一个实施例中，材料层堆叠的自由磁层设置在隧道势垒层和氧化镁（Mg）的盖层之间。 自由磁层包括基本上由钴原子，铁原子和硼原子的组合构成的钴 - 铁 - 硼（CoFeB）体。 在与自由磁性层与隧道势垒层的界面邻接的第一区域中，CoFeB主体的第一硼质量分数等于或大于25％（例如，等于或大于27％）。 在另一个实施例中，第一硼质量分数大于CoFeB主体的第二区域中的第二硼质量分数，所述第二区域邻接自由磁层与帽层的界面。
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Patent Agency Ranking5.发明申请
公开(公告)号：WO2018125221A1
公开(公告)日：2018-07-05
申请号：PCT/US2016/069528
申请日：2016-12-30
Applicant: INTEL CORPORATION
Inventor： RAHMAN, MD Tofizur , WIEGAND, Christopher J. , OGUZ, Kaan , OUELLETTE, Daniel G. , MAERTZ, Brian , O'BRIEN, Kevin P. , DOCZY, Mark L. , DOYLE, Brian S. , GOLONZKA, Oleg , GHANI, Tahir
Abstract: A material layer stack for a pSTTM device includes a fixed magnetic layer, a tunnel barrier disposed above the fixed magnetic layer and a free layer disposed on the tunnel barrier. The free layer further includes a stack of bilayers where an uppermost bilayer is capped by a magnetic layer including iron and where each of the bilayers in the free layer includes a non-magnetic layer such as Tungsten, Molybdenum disposed on the magnetic layer. In an embodiment, the non-magnetic layers have a combined thickness that is less than 15% of a combined thickness of the magnetic layers in the stack of bilayers. A stack of bilayers including non-magnetic layers in the free layer can reduce the saturation magnetization of the material layer stack for the pSTTM device and subsequently increase the perpendicular magnetic anisotropy.
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6.发明申请APPROACHES FOR STRAIN ENGINEERING OF PERPENDICULAR MAGNETIC TUNNEL JUNCTIONS (PMTJS) AND THE RESULTING STRUCTURES 审中-公开垂直磁隧道结（PMTJS）应变工程及其结构的探讨
公开(公告)号：WO2017171747A1
公开(公告)日：2017-10-05
申请号：PCT/US2016/024898
申请日：2016-03-30
Applicant: INTEL CORPORATION
Inventor： OUELLETTE, Daniel G. , WIEGAND, Christopher J. , RAHMAN, MD Tofizur , MAERTZ, Brian , GOLONZKA, Oleg , BROCKMAN, Justin S. , O'BRIEN, Kevin P. , DOYLE, Brian S. , OGUZ, Kaan , GHANI, Tahir , DOCZY, Mark L.
Abstract: Approaches for strain engineering of perpendicular magnetic tunnel junctions (pMTJs), and the resulting structures, are described. In an example, a memory structure includes a perpendicular magnetic tunnel junction (pMTJ) element disposed above a substrate. A lateral strain-inducing material layer is disposed on the pMTJ element. An inter-layer dielectric (ILD) layer is disposed laterally adjacent to both the pMTJ element and the lateral strain-inducing material layer. The ILD layer has an uppermost surface co-planar or substantially co-planar with an uppermost surface of the lateral strain-inducing material layer.
Abstract translation: 描述垂直磁隧道结（pMTJs）的应变工程的方法和所得到的结构。 在一个示例中，存储器结构包括设置在衬底上方的垂直磁隧道结（pMTJ）元件。 横向应变诱导材料层设置在pMTJ元件上。 层间电介质（ILD）层横向地邻近pMTJ元件和横向应变诱导材料层设置。 ILD层具有与横向应变诱导材料层的最上表面共面或基本共面的最上表面。
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7.发明申请
公开(公告)号：WO2018063338A1
公开(公告)日：2018-04-05
申请号：PCT/US2016/054821
申请日：2016-09-30
Applicant: INTEL CORPORATION
Inventor： OGUZ, Kaan , O'BRIEN, Kevin P. , DOYLE, Brian S. , DOCZY, Mark L. , KUO, Charles C. , OUELLETTE, Daniel G. , WIEGAND, Christopher J. , RAHMAN, MD Tofizur , MAERTZ, Brian
CPC classification number: H01L43/08 , H01L27/228 , H01L43/10 , H01L43/12
Abstract: Systems, apparatus, and methods for magnetoresitive memory are described. An apparatus for magnetoresitive memory includes a fixed layer, a free layer, and a tunneling barrier between the fixed layer and the free layer. The free layer is a new alloy consisting of a composition of Cobalt (Co), Iron (Fe), and Boron (B) intermixed with a non-magnetic metal according to a ratio. A thin insert layer of CoFeB may optionally be added between the alloy and the tunneling barrier.
Abstract translation: 描述了用于磁阻记忆的系统，设备和方法。 一种用于磁阻记忆的设备包括固定层，自由层以及固定层和自由层之间的隧穿势垒。 自由层是由钴（Co），铁（Fe）和硼（B）组合物按照比率与非磁性金属混合而成的新合金。 可以选择性地在合金和隧道势垒之间添加CoFeB的薄插入层。
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8.发明申请
公开(公告)号：WO2017171869A1
公开(公告)日：2017-10-05
申请号：PCT/US2016/025709
申请日：2016-04-01
Applicant: INTEL CORPORATION
Inventor： MAERTZ, Brian , WIEGAND, Christopher, J. , OEULLETTE, Daniel, G. , RAHMAN, MD Tofizur , GOLONZKA, Oleg , BROCKMAN, Justin, S. , GHANI, Tahir , DOYLE, Brian, S. , O'BRIEN, Kevin, P. , DOCZY, Mark, L. , OGUZ, Kaan
Abstract: An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one another, a memory cell including a resistive memory component and an access transistor, wherein the access transistor includes a diffusion region disposed at an acute angle relative to an associated word line. A method including etching a substrate to form a plurality of fins each including a body having a length dimension including a plurality of first junction regions and a plurality of second junction regions that are generally parallel to one another and offset by angled channel regions displacing in the length dimension an end of a first junction region from the beginning of a second junction region; removing the spacer material; and introducing a gate electrode on the channel region of each of the plurality of fins.
Abstract translation: 一种装置，包括：布置在由字线和位线限定的栅格中的存储器单元阵列，存储器单元包括电阻存储器组件和存取晶体管， 其中所述存取晶体管包括相对于相关字线以锐角设置的扩散区。 一种方法包括蚀刻基板以形成多个鳍片，每个鳍片包括具有长度尺寸的主体，所述主体包括多个第一结区域和多个第二结区域，所述多个第一结区域和多个第二结区域彼此大致平行并且被成角度的沟道区域 从第二结区的起始处开始第一结区的末端; 去除间隔物材料; 并在多个鳍片中的每个鳍片的沟道区域上引入栅电极。
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公开(公告)号：WO2017052627A1
公开(公告)日：2017-03-30
申请号：PCT/US2015/052376
申请日：2015-09-25
Applicant: INTEL CORPORATION
Inventor： MADRAS, Prashanth P. , RAHMAN, MD Tofizur , WIEGAND, Christopher J. , MAERTZ, Brian , GOLONZKA, Oleg , O'BRIEN, Kevin P. , DOCZY, Mark L. , DOYLE, Brian S. , GHANI, Tahir , OGUZ, Kaan
Abstract: MTJ material stacks with a laterally strained free magnetic layer, STTM devices employing such stacks, and computing platforms employing such STTM devices. In some embodiments, perpendicular pMTJ material stacks included free magnetic layers that are compressively strained laterally by a surrounding material, which increases coercive field strength for a more stable device. In some embodiments, a pMTJ material stack is encased in a compressive-stressed material. In some further embodiments, a pMTJ material stack is encased first in a dielectric shell, permitting a conductive material to be deposited over the shell as the compressive-stressed, strain-inducing material layer.
Abstract translation: 具有横向应变自由磁性层的MTJ材料堆叠，采用这种堆叠的STTM装置以及采用这种STTM装置的计算平台。 在一些实施例中，垂直pMTJ材料堆叠包括通过周围材料横向压缩应变的自由磁性层，这增加了用于更稳定的装置的矫顽磁场强度。 在一些实施例中，pMTJ材料堆叠被包裹在压应力材料中。 在一些另外的实施例中，pMTJ材料堆首先封装在电介质外壳中，允许将导电材料作为压应力的应变诱导材料层沉积在外壳上。
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