公开(公告)号：WO2019055296A1

公开(公告)日：2019-03-21

申请号：PCT/US2018/049864

申请日：2018-09-07

Applicant: LAM RESEARCH CORPORATION

Inventor： PHILLIPS, Richard ,  BALDASSERONI, Chloe ,  MANJUNATH, Nishanth

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/67 ,  C23C16/455

Abstract: Methods and apparatuses for performing atomic layer deposition are provided. A method may include determining an amount of accumulated deposition material currently on an interior region of a deposition chamber interior, wherein the amount of accumulated deposition material changes over the course of processing a batch of substrates; applying the determined amount of accumulated deposition material to a relationship between a number of ALD cycles required to achieve a target deposition thickness, and a variable representing an amount of accumulated deposition material, wherein the applying returns a compensated number of ALD cycles for producing the target deposition thickness given the amount of accumulated deposition material currently on the interior region of the deposition chamber interior; and performing the compensated number of ALD cycles on one or more substrates in the batch.

公开(公告)号：WO2018217583A1

公开(公告)日：2018-11-29

申请号：PCT/US2018/033508

申请日：2018-05-18

Applicant: LAM RESEARCH CORPORATION

Inventor： BREILING, Patrick ,  CHANDRASEKHARAN, Ramesh ,  BALDASSERONI, Chloe ,  KIM, Sung Je ,  KARIM, Ishtak ,  ROBERTS, Mike ,  PHILLIPS, Richard ,  KUMAR, Purushottam ,  LAVOIE, Adrien

IPC: H01J37/32

Abstract: A pedestal assembly for a plasma processing system is provided. The assembly includes a pedestal with central top surface, e.g., mesa, and the central top surface extends from a center of the central top surface to an outer diameter of the central top surface. An annular surface surrounds the central top surface. The annular top surface is disposed at step down from the central top surface. A plurality of wafer supports project out of the central top surface at a support elevation distance above the central top surface. The plurality of wafer supports are evenly arranged around an inner radius of the center top surface. The inner radius is located between the center of the central top surface and less than a mid-radius that is approximately half way between the center of the pedestal and the outer diameter of the central top surface. A carrier ring configured for positioning over the annular surface of the pedestal is provided. The carrier ring has a carrier ring inner diameter, a carrier ring outer diameter, and a ledge surface that is annularly disposed around a top inner region of the carrier ring. The ledge surface is recessed below a top outer region of the carrier ring. A plurality of carrier ring supports are disposed outside of the annular surface of the pedestal. The carrier ring supports define a carrier ring elevation dimension of the carrier ring, above the central top surface of the pedestal, when the carrier ring rests upon the plurality of carrier ring supports. The carrier ring elevation dimension is configured to be higher than the central top surface of the pedestal than the support elevation distance.

公开(公告)号：WO2020163147A1

公开(公告)日：2020-08-13

申请号：PCT/US2020/015843

申请日：2020-01-30

Applicant: LAM RESEARCH CORPORATION

Inventor： LAVOIE, Adrien ,  ROBERTS, Michael Philip ,  BALDASSERONI, Chloe ,  PHILLIPS, Richard ,  CHANDRASEKHARAN, Ramesh

IPC: C23C16/458 ,  C23C16/455 ,  C23C16/505

Abstract: A system to deposit a film on a substrate using atomic layer deposition includes a pedestal arranged in a processing chamber to support the substrate on a top surface of the pedestal when depositing the film on the substrate. A first annular recess in the pedestal extends downwardly from the top surface of the pedestal and radially inwardly from an outer edge of the pedestal towards an outer edge of the substrate. The first annular recess has an inner diameter that is greater than a diameter of the substrate. An annular ring is made of a dielectric material and is arranged around the substrate in the first annular recess. A second annular recess in the pedestal is located under the annular ring. The second annular recess has a height and extends radially inwardly from the outer edge of the pedestal towards the outer edge of the substrate.

公开(公告)号：WO2019195601A1

公开(公告)日：2019-10-10

申请号：PCT/US2019/025866

申请日：2019-04-04

Applicant: LAM RESEARCH CORPORATION

Inventor： BREILING, Patrick G. ,  ROBERTS, Michael Philip ,  BALDASSERONI, Chloe ,  KARIM, Ishtak ,  LAVOIE, Adrien ,  CHANDRASEKHARAN, Ramesh

IPC: H01L21/683 ,  H02N13/00 ,  B23Q3/15 ,  H01L21/67

Abstract: Apparatuses and systems for pedestals are provided. An example pedestal may have a body with an upper annular seal surface that is planar, perpendicular to a vertical center axis of the body, and has a radial thickness, a lower recess surface offset from the upper annular seal surface, and a plurality of micro-contact areas (MCAs) protruding from the lower recess surface, each MCA having a top surface offset from the lower recess surface by a second distance less, and one or more electrodes within the body. The upper annular seal surface may be configured to support an outer edge of a semiconductor substrate when the semiconductor substrate is being supported by the pedestal, and the upper annular seal surface and the tops of the MCAs may be configured to support the semiconductor substrate when the semiconductor substrate is being supported by the pedestal.

公开(公告)号：WO2018089534A1

公开(公告)日：2018-05-17

申请号：PCT/US2017/060692

申请日：2017-11-08

Applicant: LAM RESEARCH CORPORATION

Inventor： BALDASSERONI, Chloe ,  SWAMINATHAN, Shankar

IPC: H01L21/027 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L21/02164 ,  C23C16/402 ,  C23C16/45542 ,  C23C16/56 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02348 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31144

Abstract: Methods and apparatuses for forming high modulus silicon oxide spacers using atomic layer deposition are provided. Methods involve depositing at high temperature, using high plasma energy, and post-treating deposited silicon oxide using ultraviolet radiation. Such silicon oxide spacers are suitable for use as masks in multiple patterning applications to prevent pitch walking.

Abstract translation: 提供了使用原子层沉积形成高模量氧化硅隔离物的方法和装置。 方法涉及使用高等离子体能量在高温下沉积，并使用紫外线辐射对沉积的氧化硅进行后处理。 这种氧化硅隔离物适合在多种图案化应用中用作掩模，以防止俯仰行走。