A TRANSMITTER CIRCUIT FOR AND METHODS OF GENERATING A MODULATED SIGNAL IN A TRANSMITTER

    公开(公告)号:WO2017034777A8

    公开(公告)日:2017-03-02

    申请号:PCT/US2016/045641

    申请日:2016-08-04

    Applicant: XILINX, INC.

    Inventor: KIREEV, Vassili

    Abstract: A transmitter circuit for generating a modulated signal in a transmitter of an integrated circuit is described. The transmitter circuit comprises a multiplexing stage (302) having a multiplexing circuit (305) configured to receive a differential input signal and to generate a differential output signal at a first output node (310) of a first current path and at a second output node (311) of a second current path, the multiplexing stage having a gain circuit configured to increase the swing of the differential output signal generated at the first output node and the second output node. A method of generating a modulated signal in a transmitter of an integrated circuit is also disclosed.

    A TRANSMITTER CIRCUIT FOR AND METHODS OF GENERATING A MODULATED SIGNAL IN A TRANSMITTER
    3.
    发明申请
    A TRANSMITTER CIRCUIT FOR AND METHODS OF GENERATING A MODULATED SIGNAL IN A TRANSMITTER 审中-公开
    用于发送变送器中的调制信号的发射机电路及其生成方法

    公开(公告)号:WO2017034777A1

    公开(公告)日:2017-03-02

    申请号:PCT/US2016/045641

    申请日:2016-08-04

    Applicant: XILINX, INC.

    Inventor: KIREEV, Vassili

    Abstract: A transmitter circuit for generating a modulated signal in a transmitter of an integrated circuit is described. The transmitter circuit comprises a multiplexing stage (302) having a multiplexing circuit (305) configured to receive a differential input signal and to generate a differential output signal at a first output node (310) of a first current path and at a second output node (311) of a second current path, the multiplexing stage having a gain circuit configured to increase the swing of the differential output signal generated at the first output node and the second output node. A method of generating a modulated signal in a transmitter of an integrated circuit is also disclosed.

    Abstract translation: 描述了用于在集成电路的发射机中产生调制信号的发射机电路。 发射机电路包括具有多路复用电路(305)的复用级(302),复用电路(305)被配置为接收差分输入信号并且在第一电流路径的第一输出节点(310)处产生差分输出信号,并且在第二输出节点 (311),所述多路复用级具有增益电路,其被配置为增加在所述第一输出节点和所述第二输出节点处产生的差分输出信号的摆幅。 还公开了一种在集成电路的发射机中产生调制信号的方法。

    METHOD AND CIRCUITS FOR COMMUNICATION IN MULTI-DIE PACKAGES
    5.
    发明申请
    METHOD AND CIRCUITS FOR COMMUNICATION IN MULTI-DIE PACKAGES 审中-公开
    多模封装通信方法与电路

    公开(公告)号:WO2016160063A1

    公开(公告)日:2016-10-06

    申请号:PCT/US2015/055081

    申请日:2015-10-12

    Applicant: XILINX, INC.

    Abstract: Various example implementations are directed to circuits and methods for inter-die communication on a multi-die integrated circuit (IC) package. According to an example implementation, an IC package (200, 400) includes a first semiconductor die (208, 400) having a plurality of communication circuits for communicating data over respective data terminals (218) of the package. The package also includes a second semiconductor die (102, 410) having N contacts (140, 206) for communicating data to and from the semiconductor die. The second semiconductor die (102, 410) includes a programmable logic circuit (1 10, 412) configured to communicate M parallel data signals with one or more other semiconductor dies of the package, wherein M>N. The second semiconductor die also includes a plurality of serializer circuits (130, 414), each configured to serialize data from a respective subset of the plurality of the M signal lines (120, 416) to produce serialized data and provide the serialized data to a respective one of the contacts (140, 206).

    Abstract translation: 各种示例性实现涉及用于多芯片集成电路(IC)封装上的管芯间通信的电路和方法。 根据示例实现,IC封装(200,400)包括具有多个通信电路的第一半导体管芯(208,400),用于在封装的相应数据端子(218)上传送数据。 封装还包括具有N个触点(140,206)的第二半导体管芯(102,410),用于将数据传送到半导体管芯和从半导体管芯传送数据。 第二半导体管芯(102,410)包括被配置为将M个并行数据信号与封装的一个或多个其它半导体管芯通信的可编程逻辑电路(110,412),其中M> N。 第二半导体裸片还包括多个串行化器电路(130,414),每个串行器电路被配置为串行化来自多个M个信号线(120,416)的相应子集的数据,以产生串行数据并将序列化数据提供给 相应的一个触点(140,206)。

    DRIVER CIRCUIT AND METHOD OF GENERATING AN OUTPUT SIGNAL
    6.
    发明申请
    DRIVER CIRCUIT AND METHOD OF GENERATING AN OUTPUT SIGNAL 审中-公开
    驱动电路和产生输出信号的方法

    公开(公告)号:WO2013106091A1

    公开(公告)日:2013-07-18

    申请号:PCT/US2012/053443

    申请日:2012-08-31

    CPC classification number: H03K19/018521 H04L25/0264

    Abstract: A driver circuit of an integrated circuit is described. The driver circuit comprises a signal node (122) coupled to receive an output signal of the integrated circuit; an inductor circuit (106) having a resistor (1 6) coupled in series with an inductor (118) between a first terminal and a second terminal, wherein the first terminal is coupled to the signal node; an electro-static discharge protection circuit (130) coupled to the second terminal of the inductor circuit; and an output node (104) coupled to the second terminal of the inductor circuit. A method of generating an output signal is also disclosed.

    Abstract translation: 描述集成电路的驱动电路。 驱动器电路包括耦合以接收集成电路的输出信号的信号节点(122); 电感器电路(106),其具有与第一端子和第二端子之间的电感器(118)串联耦合的电阻器(116),其中所述第一端子耦合到所述信号节点; 耦合到电感器电路的第二端子的静电放电保护电路(130); 以及耦合到电感器电路的第二端子的输出节点(104)。 还公开了一种产生输出信号的方法。

    A MULTIPLE-LOOP SYMMETRICAL INDUCTOR
    7.
    发明申请
    A MULTIPLE-LOOP SYMMETRICAL INDUCTOR 审中-公开
    多环对称电感器

    公开(公告)号:WO2012050703A1

    公开(公告)日:2012-04-19

    申请号:PCT/US2011/051247

    申请日:2011-09-12

    Applicant: XILINX, INC.

    CPC classification number: H01F17/0013 H01F2017/0073 Y10T29/4902

    Abstract: A symmetrical inductor includes pairs of half-loops (e.g., 312, 314, 316, 318), first and second terminal electrodes (e.g., 302, 304), and a center-tap electrode (e.g., 310). The half-loop pairs are in respective conductive layers (e.g., 101, 201 ) of an integrated circuit. Each half-loop pair includes a first (e.g., 312, 316) and second half-loop (e.g., 314, 318) in the respective conductive layer. The first and second terminal electrodes are in a first conductive layer, and the center-tap electrode is in a second conductive layer. The first terminal electrode and the center-tap electrode are coupled through a first series combination that includes the first half-loop of each half-loop pair. The second terminal electrode and the center-tap electrode are coupled through a second series combination that includes the second half-loop of each half-loop pair.

    Abstract translation: 对称电感器包括一对半环(例如,312,314,316,318),第一和第二端子电极(例如,302,304)和中心抽头电极(例如310)。 半环对在集成电路的各个导电层​​(例如,101,201)中。 每个半环对包括相应导电层中的第一(例如312,316)和第二半环(例如,314,318)。 第一和第二端子电极在第一导电层中,中心抽头电极处于第二导电层中。 第一端子电极和中心抽头电极通过包括每个半环对的第一半环的第一串联组合耦合。 第二端子电极和中心抽头电极通过包括每个半环对的第二半环的第二串联组合耦合。

    STACKED DUAL INDUCTOR STRUCTURE
    8.
    发明申请
    STACKED DUAL INDUCTOR STRUCTURE 审中-公开
    堆叠式双电感结构

    公开(公告)号:WO2011126516A1

    公开(公告)日:2011-10-13

    申请号:PCT/US2010/055787

    申请日:2010-11-08

    Applicant: XILINX, INC.

    Inventor: KIREEV, Vassili

    Abstract: The dual inductor structure (100) can include a first inductor (110) including a first plurality of coils (205-220). Each coil of the first plurality of coils can be disposed within a different one of a plurality of conductive layers (105, 255-260). The coils of the first plurality of coils can be vertically stacked and concentric to a vertical axis. The dual inductor structure further can include a second inductor (115) including a second plurality of coils (405-420). Each of the second plurality of coils can be disposed within a different one of the plurality of conductive layers. The coils of the second plurality of coils can be vertically stacked and concentric to the vertical axis. Within each conductive layer, a coil of the second plurality of coils can be disposed within an inner perimeter of a coil of the first plurality of coils.

    Abstract translation: 双电感器结构(100)可以包括包括第一多个线圈(205-220)的第一电感器(110)。 第一多个线圈的每个线圈可以设置在多个导电层(105,255-260)中的不同的一个内。 第一组线圈的线圈可垂直地堆叠并与垂直轴同心。 双电感器结构还可以包括包括第二多个线圈(405-420)的第二电感器(115)。 第二多个线圈中的每一个可以设置在多个导电层中的不同的一个中。 第二组线圈的线圈可垂直地堆叠并与垂直轴同心。 在每个导电层内,第二多个线圈的线圈可以设置在第一多个线圈的线圈的内周边内。

    CIRCUITS FOR AND METHODS OF GENERATING A MODULATED SIGNAL IN A TRANSMITTER
    9.
    发明申请
    CIRCUITS FOR AND METHODS OF GENERATING A MODULATED SIGNAL IN A TRANSMITTER 审中-公开
    在发射机中产生调制信号的电路和方法

    公开(公告)号:WO2017011479A1

    公开(公告)日:2017-01-19

    申请号:PCT/US2016/041942

    申请日:2016-07-12

    Applicant: XILINX, INC.

    Abstract: A circuit for generating a modulated signal in a transmitter of an integrated circuit is disclosed. The circuit comprises a transmitter driver circuit (302) having a first current path (325) for receiving a first input signal (Dataln) of a pair of differential input signals and a second current path (329) for receiving a second input signal (Dataln_b) of the pair of differential input signals, the transmitter driver circuit comprising a tail current path (327) coupled to each of the first current path and the second current path; a first current source (370) coupled between a first reference voltage (AVCCAUX) and ground (AVSS), wherein a first current of the first current source is proportional to the tail current of the tail current path; a first pull-up current source (460) coupled between the first reference voltage and a first output node (314) of the transmitter driver circuit; and a second pull-up current source (480) coupled between the first reference voltage and a second output node (320) of the transmitter driver circuit. A method of generating a modulated signal in a transmitter of an integrated circuit is also disclosed.

    Abstract translation: 公开了一种用于在集成电路的发射机中产生调制信号的电路。 该电路包括具有用于接收一对差分输入信号的第一输入信号(Dataln)和用于接收第二输入信号(Dataln_b)的第二电流路径(329))的第一电流路径(325)的发射器驱动电路(302) )所述一对差分输入信号,所述发射器驱动器电路包括耦合到所述第一电流路径和所述第二电流路径中的每一个的尾电流路径(327) 耦合在第一参考电压(AVCCAUX)和地(AVSS)之间的第一电流源(370),其中第一电流源的第一电流与尾电流路径的尾电流成比例; 第一上拉电流源(460),耦合在所述第一参考电压和所述发射器驱动器电路的第一输出节点(314)之间; 以及耦合在所述发射器驱动器电路的所述第一参考电压和第二输出节点(320)之间的第二上拉电流源(480)。 还公开了一种在集成电路的发射机中产生调制信号的方法。

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