公开(公告)号：WO2020013827A1

公开(公告)日：2020-01-16

申请号：PCT/US2018/041813

申请日：2018-07-12

Applicant: INTEL CORPORATION (a corporation of Delaware)

Inventor： ORHAN, Oner ,  ARYAFAR, Ehsan ,  CARLTON, Brent ,  HIMAYAT, Nageen ,  HULL, Christopher ,  NADERIALIZADEH, Navid ,  NIKOPOUR, Hosein ,  PELLERANO, Stefano ,  RAHMAN, Mustafijur ,  TALWAR, Shilpa ,  ZHU, Jing

IPC: H04B7/06 ,  H04B7/08

Abstract: Methods, apparatus, and computer-readable media are described to use multi-finger beamforming for multimeter wave communications. A base station associates with first and second user equipment. Weight sum rates are determined for the user equipment. Transmissions are scheduled to the user equipment based on the weight sum rates. Data is encoded for the first user equipment and transmitted based on the schedule. Data is encoded for the second user equipment and transmitted based on the schedule. The transmissions are multiplexed in the power domain.

公开(公告)号：WO2012098471A2

公开(公告)日：2012-07-26

申请号：PCT/IB2012/000518

申请日：2012-03-17

Applicant: INTEL CORPORATION (a corporation of Delaware) ,  HECK, John ,  BAR, Hanan ,  JONES, Richard ,  PARK, Hyundai

Inventor： HECK, John ,  BAR, Hanan ,  JONES, Richard ,  PARK, Hyundai

IPC: H01S5/343 ,  H01S5/20

CPC classification number: H01S5/021 ,  H01S5/0215 ,  H01S5/0422 ,  H01S5/1032 ,  H01S5/2004 ,  H01S5/2205

Abstract: Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.

Abstract translation: 本文描述的是混合III-V硅激光器，其包括第一半导体区域，其包括来自III族，IV族或V族半导体的半导体材料的层，以形成有源区; 以及第二半导体区域，具有硅波导，并且通过在第一半导体区域的层的室温下直接接合而与第一半导体区域接合。

公开(公告)号：WO2012079188A1

公开(公告)日：2012-06-21

申请号：PCT/CN2010/002025

申请日：2010-12-13

Applicant: INTEL CORPORATION (a corporation of Delaware) ,  WU, Gansha ,  ZHANG, Dan ,  CHEN, Biao ,  CHEN, Yongjian (Eugene) ,  GUO, Peng ,  LIU, Zhanglin ,  WANG, Zhigang ,  ZHOU, Xin

Inventor： WU, Gansha ,  ZHANG, Dan ,  CHEN, Biao ,  CHEN, Yongjian (Eugene) ,  GUO, Peng ,  LIU, Zhanglin ,  WANG, Zhigang ,  ZHOU, Xin

IPC: G06F17/30

CPC classification number: H04N21/2407 ,  G06F17/30017 ,  G06F17/30817

Abstract: We are facing an explosion in availability of online content, in particular accessing audio, video, and other data is considered to be driving the expansion of the Internet to accommodate access needs. However, time availability for accessing such data remains constrained and it is becoming more imperative that a technology be utilized to package the data, for example, as a Collective Cut, to facilitate its consumption by pre-identifying portions of the data that are expected to be interesting to a consumer. Such packaging has many possibilities. For example, in the audio context, audio data could be presented to a consumer with specific portions of an audio presentation highlighted as the best portions to listen to if the consumer lacks sufficient time to listen to the entire presentation. In the video context, video highlights for a movie or other consumable data may be provided, allowing a consumer to electively skip through the highlights if there is insufficient time and/or interest in viewing the entire presentation.

Abstract translation: 我们正在面对在线内容的可用性的爆炸式爆炸，特别是访问音频，视频和其他数据被认为正在推动互联网的扩展以适应访问需求。 然而，用于访问这些数据的时间可用性仍然受到限制，并且使用技术来将数据打包（例如，作为集体剪辑）变得越来越重要，以通过预先识别期望的 对消费者有兴趣 这种包装有许多可能性。 例如，在音频上下文中，音频数据可以呈现给具有突出显示为音频呈现的特定部分的消费者，作为听到消费者没有足够时间收听整个呈现的最佳部分。 在视频环境中，可以提供电影或其他消耗品数据的视频亮点，如果没有足够的时间和/或兴趣观看整个呈现，消费者可以选择性跳过亮点。

公开(公告)号：WO2009035882A1

公开(公告)日：2009-03-19

申请号：PCT/US2008/075084

申请日：2008-09-03

Applicant: INTEL CORPORATION (a corporation of Delaware) ,  SANE, Sandeep ,  RARAVIKAR, Nachiket, R.

Inventor： SANE, Sandeep ,  RARAVIKAR, Nachiket, R.

IPC: H01L23/488 ,  H01L21/768 ,  G05F1/00

CPC classification number: H01L21/563 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3157 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1182 ,  H01L2224/11827 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13687 ,  H01L2224/13693 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/8192 ,  H01L2224/81948 ,  H01L2224/831 ,  H01L2224/83379 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include coating an interconnect structure disposed on a die with a layer of functionalized nanoparticles, wherein the functionalized nanoparticles are dispersed in a solvent, heating the layer of functionalized nanoparticles to drive off a portion of the solvent, and applying an underfill on the coated interconnect structure.

Abstract translation: 描述形成微电子器件的方法和相关结构。 这些方法可以包括用功能化纳米颗粒层涂布设置在管芯上的互连结构，其中官能化纳米颗粒分散在溶剂中，加热官能化纳米颗粒层以驱除溶剂的一部分，并将底部填充物 涂层互连结构。

公开(公告)号：WO2006039201A2

公开(公告)日：2006-04-13

申请号：PCT/US2005/034145

申请日：2005-09-21

Applicant: INTEL CORPORATION (a corporation of Delaware) ,  AKKARY, Haitham ,  RAJWAR, Ravi ,  SRINIVASAN, Srikanth

Inventor： AKKARY, Haitham ,  RAJWAR, Ravi ,  SRINIVASAN, Srikanth

IPC: G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/384 ,  G06F9/3863

Abstract: Embodiments of the present invention relate to a system and method for comparatively increasing processor throughput and relieving pressure on the processor's scheduler and register file by diverting instructions dependent on long-latency operations from a flow of the processor pipeline and re-introducing them into the flow when the long-latency operations are completed. In this way, the instructions do not tie up resources and overall instruction throughput in the pipeline is comparatively increased.

Abstract translation: 本发明的实施例涉及一种用于相对增加处理器吞吐量并减轻处理器调度器和寄存器文件上的压力的系统和方法，该方法是根据来自处理器流水线的长时间延迟操作转移指令并将其重新引入流程 当长时间延迟操作完成时。 以这种方式，指令不会占用资源，并且管道中的总体指令吞吐量相对增加。

公开(公告)号：WO2005101761A1

公开(公告)日：2005-10-27

申请号：PCT/US2005/010924

申请日：2005-03-31

Applicant: INTEL CORPORATION (a corporation of Delaware) ,  KUMAR, Alok ,  KOUNAVIS, Michael ,  YAVATKAR, Raj ,  CHANDRA, Prashant ,  LAKSHMANAMURTHY, Sridhar ,  KUO, Chen-Chi ,  VIN, Harrick

Inventor： KUMAR, Alok ,  KOUNAVIS, Michael ,  YAVATKAR, Raj ,  CHANDRA, Prashant ,  LAKSHMANAMURTHY, Sridhar ,  KUO, Chen-Chi ,  VIN, Harrick

IPC: H04L12/56

CPC classification number: H04L47/10 ,  H04L29/06 ,  H04L47/2441 ,  H04L63/0236 ,  H04L63/0263 ,  H04L69/22

Abstract: A method and apparatus for two-stage packet classification. In the first stage, which may be implemented in software, a packet is classified on the basis of the packet's network path and, perhaps, its protocol. In the second stage, which may be implemented in hardware, the packet is classified on the basis of one or more transport level fields of the packet. An apparatus of two-stage packet classification may include a processing system for first stage code execution, a classification circuit for performing the second stage of classification, and a memory to store a number of bins, each bin including one or more rules.

Abstract translation: 一种用于两阶段分组分类的方法和装置。 在可以在软件中实现的第一阶段中，基于分组的网络路径以及可能的协议对分组进行分类。 在可以硬件实现的第二阶段中，基于分组的一个或多个传输级别字段对分组进行分类。 两级分组分类的装置可以包括用于第一阶段代码执行的处理系统，用于执行第二阶段分类的分类电路和存储多个分区的存储器，每个分组包括一个或多个规则。

公开(公告)号：WO2005098740A1

公开(公告)日：2005-10-20

申请号：PCT/US2005/010395

申请日：2005-03-25

Applicant: INTEL CORPORATION (a Corporation of Delaware) ,  NEFIAN, Ara ,  RAJARAM, Shyamsundar

Inventor： NEFIAN, Ara ,  RAJARAM, Shyamsundar

IPC: G06K9/00

CPC classification number: G10L15/25

Abstract: Methods, systems, and apparatus are provided to separate and evaluate audio and video. Audio and video are captured; the video is evaluated to detect one or more speakers speaking. Visual features are associated with the speakers speaking. The audio and video are separated and corresponding portions of the audio are mapped to the visual features for purposes of isolating audio associated with each speaker and for purposes of filtering out noise associated with the audio.

Abstract translation: 提供方法，系统和设备来分离和评估音频和视频。 音频和视频被捕获; 评估视频以检测一个或多个说话者。 可视功能与扬声器相关联。 音频和视频被分离，音频的相应部分映射到视觉特征，以便隔离与每个扬声器相关联的音频，并且用于滤除与音频相关联的噪声。

公开(公告)号：WO2005026950A2

公开(公告)日：2005-03-24

申请号：PCT/US2004/027746

申请日：2004-08-25

Applicant: INTEL CORPORATION (a corporation of Delaware)

Inventor： DUNSTAN, Robert ,  SELSETH, Larry ,  NOWLIN, Dan

IPC: G06F9/44

CPC classification number: G06F1/30 ,  G06F1/3203 ,  G06F9/4418 ,  G06F11/2015 ,  Y02D10/44

Abstract: A system is provided with a basic input/output system (BIOS) with the ability to intervene, when a suspend process is initiated in response to an AC failure condition to place the system in a suspended to memory state, to initiate a number of data transfer operations to save a persistent copy of an operational state of the system. The BIOS is fursther equipped to check one or more times whether the data transfer operations are completed, and causing a processor of the system to operate in a reduced power consumption mode at least one time period while the BIOS is not performing the checking.

Abstract translation: 系统具有基本输入/输出系统（BIOS），当启动暂停过程以响应AC故障条件以将系统置于暂停存储器时，能够干预 状态，以启动多个数据传输操作以保存系统的操作状态的持续副本。 BIOS还配备有一次或多次检查数据传输操作是否完成，并使BIOS的系统的处理器在BIOS未执行检查的至少一个时间段内以降低的功耗模式操作。 p>

公开(公告)号：WO2004109500A2

公开(公告)日：2004-12-16

申请号：PCT/US2004/015986

申请日：2004-05-20

Applicant: INTEL CORPORATION (a corporation of Delaware)

Inventor： FRAME, David ,  MAURITZ, Karl

IPC: G06F9/38

CPC classification number: G06F11/2007 ,  G06F11/1666 ,  G06F11/2005 ,  G06F13/1657

Abstract: A memory architecture with a tree based topology. Memory devices are paired with intelligent memory hubs that service memory access requests and manage data in the network of memory devices. Memory hubs can reconfigure the network topology dynamically to compensate for failed devices or the addition or removal of devices. The memory architecture can also support input output devices and be shared between multiple systems.

Abstract translation: 具有树型拓扑的存储器架构。 内存设备与智能内存中心配对，可以为内存访问请求提供服务，并管理内存设备网络中的数据。 内存中心可以动态重新配置网络拓扑，以补偿故障设备或添加或删除设备。 存储器架构还可以支持输入输出设备并在多个系统之间共享。

公开(公告)号：WO2004061629A2

公开(公告)日：2004-07-22

申请号：PCT/US2003/039125

申请日：2003-12-08

Applicant: INTEL CORPORATION (a corporation of Delaware)

Inventor： KAUSHIK, Shivnandan ,  BIGBEE, Bryant ,  NEWBURN, Chris

IPC: G06F1/00

CPC classification number: G06F11/3636 ,  G06F21/52 ,  G06F21/62 ,  G06F2221/2113

Abstract: Methods and systems are provided to selectively log branch trace store data associated with the execution of an application. A privilege level is received, which identifies an execution mode for a processor for which branch trace store data is to be logged to a buffer. The privilege level is used to set one or more privilege flags that permit selective branch trace store data to be logged in the buffer when the application is executed. In one embodiment, the privilege level represents a user application mode, a supervisory application mode, or a mode representing both a user application mode and a supervisory application mode.

Abstract translation: 提供方法和系统来选择性地记录与执行应用程序相关联的分支跟踪存储数据。 接收到一个特权级别，它标识处理器的执行模式，哪个分支跟踪存储数据将被记录到缓冲区。 权限级别用于设置一个或多个权限标志，允许选择性分支跟踪存储数据在执行应用程序时记录在缓冲区中。 在一个实施例中，权限级别表示用户应用模式，监督应用模式或表示用户应用模式和监督应用模式两者的模式。