ENABLING SECURED DEBUG OF AN INTEGRATED CIRCUIT
    6.
    发明申请
    ENABLING SECURED DEBUG OF AN INTEGRATED CIRCUIT 审中-公开
    启用集成电路的安全调试

    公开(公告)号:WO2015032571A1

    公开(公告)日:2015-03-12

    申请号:PCT/EP2014/066918

    申请日:2014-08-06

    发明人: SVENSSON, Peter

    IPC分类号: G01R31/3185 G01R31/317

    摘要: The disclosed invention enables secured debug of an integrated circuit (300) which has a test operation mode and a secure mission operation mode. The integrated circuit has a processing unit (340), a test interface (312) through which the test operation mode is controllable, an on-chip memory (350) which is accessible in the test operation mode and in the secure mission operation mode, and one or more protected resources (360, 364, 370) which are inaccessible in the test operation mode. The processing unit is configured, in the test operation mode, to receive (401) an authenticated object (401) through the test interface, and store (401) the received authenticated object in the on-chip memory. The processing unit is moreover configured, upon reset into the secure mission operation mode, to execute a boot procedure (362) to determine (501) that the authenticated object is available in the on- chip memory, authenticate (502) the authenticated object, and-upon successful authentication -render (503a, 503b) the more protected resources accessible to a debug host (310) external to the integrated circuit.

    摘要翻译: 所公开的发明实现了具有测试操作模式和安全任务操作模式的集成电路(300)的安全调试。 集成电路具有处理单元(340),测试操作模式可控制的测试接口(312),可在测试操作模式和安全任务操作模式下访问的片上存储器(350) 以及在测试操作模式下不可访问的一个或多个受保护资源(360,364,370)。 处理单元在测试操作模式下被配置为通过测试接口接收认证对象(401)(401),并将接收到的认证对象存储在片上存储器(401)中。 此外,处理单元还被配置为在复位到安全任务操作模式中时,执行引导过程(362)以确定(501)认证对象在片上存储器中可用,认证(502)已认证对象, 并且在成功的认证转发器(503a,503b)上,集成电路外部的调试主机(310)可访问的受保护资源越多。