公开(公告)号：WO2021194810A1

公开(公告)日：2021-09-30

申请号：PCT/US2021/022658

申请日：2021-03-17

Applicant: ROGERS CORPORATION

Inventor： NEILL, John Thomas ,  AGAPOV, Rebecca ,  HIMES, Matthew Raymond

IPC: B32B27/08 ,  B32B27/20 ,  B32B27/30 ,  B32B7/12 ,  B32B27/16 ,  B32B5/16 ,  B32B15/16 ,  B32B27/14 ,  B32B2262/0253 ,  B32B2264/02 ,  B32B2264/0257 ,  B32B2264/101 ,  B32B2264/102 ,  B32B2264/107 ,  B32B2307/204 ,  B32B2307/30 ,  B32B2307/518 ,  B32B2307/54 ,  B32B2307/748 ,  B32B2457/08 ,  B32B27/304 ,  H05K1/0281 ,  H05K1/036 ,  H05K2201/015 ,  H05K2203/065 ,  H05K3/4688

Abstract: In an aspect, a circuit material comprises a multilayer stack comprising alternating layers of a reinforcing layer and a fluoropolymer layer; wherein the fluoropolymer layer comprises a fluoropolymer other than a biaxially-oriented polytetrafluoroethylene; wherein the reinforcing layer comprises a biaxially-oriented polytetrafluoroethylene; and wherein an electrically conductive layer is in direct physical contact with an outer surface of the multilayer stack. In another aspect, an article comprises the circuit material. In yet another aspect, a method of making the circuit material comprises laminating the multilayer stack and the electrically conductive layer to form the circuit material; or laminating a layered stack comprising the conductive layer and alternative layers of the fluoropolymer layers and the reinforcing layer to form the circuit material.

公开(公告)号：WO2021125890A1

公开(公告)日：2021-06-24

申请号：PCT/KR2020/018702

申请日：2020-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JEON, Jongmin ,  HONG, Eunseok

IPC: H05K1/11 ,  H05K1/09 ,  H05K1/03 ,  H05K1/18 ,  H05K3/00 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/02 ,  H05K3/361 ,  H05K3/4652

Abstract: Disclosed is a printed circuit board (PCB) module including a first PCB comprising a base PCB, a sidewall disposed on a periphery of the base PCB, and conductive vias penetrating the sidewall, a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB, and at least one electronic component disposed inside the cavity and located on the first PCB and/or the second PCB, wherein the sidewall comprises a first layer disposed on an upper face of the base PCB and constructed of an insulating member, a second layer disposed on the first layer and comprising a polyimide, a third layer disposed on the second layer and constructed of an insulating member, and a fourth layer disposed on the third layer and comprising a conductive member conductive with respect to the conductive vias.