- 专利标题: Dynamic lane access switching between PCIe root spaces
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申请号: US16396153申请日: 2019-04-26
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公开(公告)号: US10817454B2公开(公告)日: 2020-10-27
- 发明人: Chih-Cheh Chen , Janusz P. Jurski , Amit Kumar Srivastava , Malay Trivedi , James Mitchell , Piotr Michael Kwidzinski , David N. Lombard
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Alliance IP, LLC
- 主分类号: G06F13/40
- IPC分类号: G06F13/40 ; G06F13/42 ; G06F1/329 ; G06F1/3234 ; G06F9/38 ; G06F1/3228
摘要:
An apparatus includes physical layer circuitry with lanes to couple the apparatus to endpoint devices. a first input/output (I/O) controller to couple a first processor to the physical layer circuitry, and a second I/O controller to couple a second processor to the physical layer circuitry. The first and second I/O controllers are compatible with a Peripheral Component Interconnect Express (PCIe)-based protocol. The apparatus also includes a flexible input/output adapter (FIA) coupling the first and second I/O controllers to the lanes. The FIA selectively assigns access to each lane of the lanes by either the first or second I/O controller. The apparatus also includes a power management controller (PMC) communicably coupled to the FIA. The PMC causes the FIA to dynamically assign access to at least one of the lanes by the first or second I/O controller without a reboot cycle.
公开/授权文献
- US20190251055A1 DYNAMIC LANE ACCESS SWITCHING BETWEEN PCIE ROOT SPACES 公开/授权日:2019-08-15
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