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    Method and apparatus for dynamic node healing in a multi-node environment
    1.
    发明授权
    Method and apparatus for dynamic node healing in a multi-node environment 有权
    多节点环境下动态节点愈合的方法和装置

    公开(公告)号：US09477564B2

    公开(公告)日：2016-10-25

    申请号：US14310835

    申请日：2014-06-20

    申请人： INTEL CORPORATION

    发明人： Robert C. Swanson ,  Robert W. Cone ,  Malay Trivedi

    IPC分类号： G06F11/20 ,  G06F13/42 ,  G06F13/40

    CPC分类号： G06F11/2033 ,  G06F11/1428 ,  G06F11/2002 ,  G06F13/4027 ,  G06F13/4221 ,  G06F2201/845 ,  G06F2201/85

    摘要： Method and apparatus for dynamic Node healing in a Multi-Node environment. A multi-node platform controller hub (MN-PCH) is configured to support multiple nodes through use of dedicated interfaces and components and shared capabilities. Interfaces and components may be configured to be used by respective nodes, or may be configured to support enhanced resiliency as redundant primary and spare interfaces and components. In response to detecting a failing or failing primary interface or component, the MN-PCH automatically performs failover operations to replace the primary with the spare. Moreover, the failover operation is transparent to the operating systems running on the platform's nodes.

    摘要翻译： 多节点环境中动态节点愈合的方法和装置。 多节点平台控制器集线器（MN-PCH）被配置为通过使用专用接口和组件以及共享功能来支持多个节点。 接口和组件可以被配置为由相应节点使用，或者可以被配置为支持作为冗余主要和备用接口和组件的增强的弹性。 为了响应检测到故障或故障的主接口或组件，MN-PCH自动执行故障切换操作，以将备用主机替换为备用。 此外，故障切换操作对于在平台节点上运行的操作系统是透明的。

    Dynamic lane access switching between PCIe root spaces
    2.
    发明授权
    Dynamic lane access switching between PCIe root spaces 有权

    公开(公告)号：US10817454B2

    公开(公告)日：2020-10-27

    申请号：US16396153

    申请日：2019-04-26

    申请人： Intel Corporation

    发明人： Chih-Cheh Chen ,  Janusz P. Jurski ,  Amit Kumar Srivastava ,  Malay Trivedi ,  James Mitchell ,  Piotr Michael Kwidzinski ,  David N. Lombard

    IPC分类号： G06F13/40 ,  G06F13/42 ,  G06F1/329 ,  G06F1/3234 ,  G06F9/38 ,  G06F1/3228

    摘要： An apparatus includes physical layer circuitry with lanes to couple the apparatus to endpoint devices. a first input/output (I/O) controller to couple a first processor to the physical layer circuitry, and a second I/O controller to couple a second processor to the physical layer circuitry. The first and second I/O controllers are compatible with a Peripheral Component Interconnect Express (PCIe)-based protocol. The apparatus also includes a flexible input/output adapter (FIA) coupling the first and second I/O controllers to the lanes. The FIA selectively assigns access to each lane of the lanes by either the first or second I/O controller. The apparatus also includes a power management controller (PMC) communicably coupled to the FIA. The PMC causes the FIA to dynamically assign access to at least one of the lanes by the first or second I/O controller without a reboot cycle.

    Multinode hubs for trusted computing
    6.
    发明授权
    Multinode hubs for trusted computing 有权
    用于可信计算的多中心

    公开(公告)号：US09413765B2

    公开(公告)日：2016-08-09

    申请号：US14225140

    申请日：2014-03-25

    申请人： INTEL CORPORATION

    发明人： Robert C. Swanson ,  Daniel Nemiroff ,  Vincent J. Zimmer ,  Mallik Bulusu ,  John R. Lindsley ,  Robert W. Cone ,  Malay Trivedi ,  Piotr Kwidzinski

    IPC分类号： H04L29/06 ,  G06F21/55 ,  G06F21/57

    CPC分类号： H04L63/10 ,  G06F3/0622 ,  G06F3/0637 ,  G06F3/0683 ,  G06F13/28 ,  G06F21/554 ,  G06F21/57 ,  G06F21/572

    摘要： Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a trapping module, and a trusted platform module (TPM) component. Each memory region may be associated with and receive trust operation data from a coherent computing node. The trapping module may generate trap notifications in response to accesses to the plurality of memory regions by the associated coherent computing nodes. The trap notifications may indicate which of the plurality of memory locations has been accessed, and the TPM component may process the trust operation data in a memory region indicated by a trap notification. Other embodiments may be disclosed and/or claimed.

    摘要翻译： 本文公开了用于信任操作的多节点集线器的实施例。 在一些实施例中，多节点集线器可以包括多个存储器区域，陷阱模块和可信平台模块（TPM）组件。 每个存储器区域可以与相干计算节点相关联并接收来自相干计算节点的信任操作数据。 捕获模块可以响应于相关联的相干计算节点对多个存储器区域的访问而产生陷阱通知。 陷阱通知可以指示已经访问了多个存储器位置中的哪一个，并且TPM组件可以处理由陷阱通知指示的存储器区域中的信任操作数据。 可以公开和/或要求保护其他实施例。

    Logging errors in error handling devices in a system
    7.
    发明授权
    Logging errors in error handling devices in a system 有权

    公开(公告)号：US10802903B2

    公开(公告)日：2020-10-13

    申请号：US15846170

    申请日：2017-12-18

    申请人： INTEL CORPORATION

    发明人： Sivakumar Radhakrishnan ,  Malay Trivedi ,  Jayasekhar Tholiyil ,  Erik A. McShane ,  Roger W. Liu ,  Mahesh S. Natu

    IPC分类号： G06F11/07

    摘要： An error handling device logs errors in a computing system including a plurality of devices connected to the error handling device. The error handling device provides groups of error registers. Each group of error registers is associated with a value of a plurality of values. Each of the devices that communicate errors to the error handling device are associated with one of the values. The error handling device receives error messages from the devices connected to the error handling device and for each received error message of the received error messages, determines a value of the plurality of values associated with the device transmitting the received error message, determines the group of error registers associated with the determined value, and log the received error message in the determined group of error registers.