Invention Grant
- Patent Title: Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy
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Application No.: US16590976Application Date: 2019-10-02
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Publication No.: US10943903B2Publication Date: 2021-03-09
- Inventor: Choonghyun Lee , Jingyun Zhang , Takashi Ando , Alexander Reznicek , Pouya Hashemi
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Jeffrey S. LaBaw
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/165 ; H01L21/02 ; H01L21/28 ; H01L29/167 ; H01L29/08 ; H01L29/78 ; H01L29/10 ; H01L29/49 ; H01L21/3065 ; H01L21/306 ; H01L21/308 ; H01L21/3105 ; H01L21/321 ; H01L21/324

Abstract:
A method is presented for triggering asymmetric threshold voltage along a channel of a vertical transport field effect transistor (VTFET). The method includes constructing a first set fins from a first material, constructing a second set of fins from a second material, forming a source region between the first set of fins, and forming a drain region between the second set of fins, the source region composed of a different material than the drain region. The method further includes depositing a first high-k metal gate over the first set of fins and depositing a second high-k metal gate over the second set of fins, the second high-k metal gate being different than the first high-k metal gate such that the asymmetric threshold voltage is present along the channel of the VTFET in a region defined at the bottom of the first and second set of fins.
Information query
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