Invention Grant
- Patent Title: Calibration for integrated memory assembly
-
Application No.: US16911333Application Date: 2020-06-24
-
Publication No.: US11488682B2Publication Date: 2022-11-01
- Inventor: Tomer Eliash , Alexander Bazarsky , Eran Sharon
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C29/14
- IPC: G11C29/14 ; G11C29/44 ; G11C29/42 ; G11C29/46 ; G11C16/26 ; G11C16/10 ; G11C29/12

Abstract:
An integrated memory assembly comprises a memory die and a control die bonded to the memory die. The memory die includes a memory structure of non-volatile memory cells. The control die is configured to program user data to and read user data from the memory die based on one or more operational parameters. The control die is configured to calibrate the one or more operational parameters for the memory die. The control die is also configured to perform testing of the memory die using the calibrated one or more operational parameters.
Public/Granted literature
- US20210407613A1 CALIBRATION FOR INTEGRATED MEMORY ASSEMBLY Public/Granted day:2021-12-30
Information query