摘要:
Provided is a double conversion receiver. The double conversion receiver comprises a direct down-converter down converting a radio frequency (RF) signal at a RF band into a zero-intermediate frequency (IF) signal at a zero-IF band, and an intermediate up-converter up converting the down-converted zero-IF signal into a low-IF signal at a low-IF band.
摘要:
Provided is a terrestrial-digital multimedia broadcasting (T-DMB) receiver. A T-DMB receiver comprises a low noise amplifier amplifying a radio frequency (RF) signal for T-DMB, a down-conversion mixer directly down converting the RF signal amplified at the low noise amplifier into a baseband signal, a down frequency oscillator generating a frequency for the down-conversion and supplying the frequency to the down-conversion mixer, and a filtering unit filtering the baseband signal output from the down-conversion mixer.
摘要:
An integrated circuit chip assembly and a package are provided. The integrated circuit chip assembly (200) comprises a substrate (210), a device part (220a,220b), and a first integrated circuit chip (230). The device part is formed on the substrate, and the first integrated circuit chip is formed on the device part. The area occupied by the integrated circuit chip can be reduced. This reduction in area allows miniaturization of devices, cost reduction, improvement in productivity, and minimization of an occurrence of electrical interference between integrated circuit chips. As a result, it is possible to prevent degradation of the performance.
摘要:
Provided is a double conversion receiver. The double conversion receiver comprises a direct down-converter down converting a radio frequency (RF) signal at a RF band into a zero-intermediate frequency (IF) signal at a zero-IF band, and an intermediate up-converter up converting the down-converted zero-IF signal into a low-IF signal at a low-IF band.
摘要:
The present invention relates to an amplifier and, more particularly, to an adaptive linear amplifier (200) with low power consumption and a high linearity. The adaptive linear amplifier (200) according to the present invention comprises amplification means (210) and a bias controller (230). The amplification means (210) comprises a main transistor (MN 21 ) and an auxiliary transistor unit (211). The main transistor (MN 21 ) and the auxiliary transistor unit (211) are coupled to each other. The bias controller (230) controls a bias Voltage applied to the main transistor (MN 21 ) and the auxiliary transistor unit (211).
摘要:
The present invention relates to a differential amplifier and a mixer for improving the linearity. The differential amplifier circuit according to this present invention, includes first and second load stages each having a predetermined voltage value, a main differential amplifier unit having a first differential stage that forms a differential pair in such a way as to amplify a difference between a first input voltage and a second input voltage, and a constant current source, which has a predetermined current driving capability and is connected serially between a power source voltage terminal and a ground terminal, and a auxiliary differential amplifier unit having a second differential stage that forms a differential pair in such a way as to amplify a difference between a third input voltage and a fourth input voltage connected between the first load stage and a second load stage, and the ground, respectively.
摘要:
The present invention relates to improved linearity of an active circuit, and more particularly, to an active circuit having improved linearity using a main circuit unit (301) and an assistant circuit unit (302). According to the present invention, the common gate circuit includes a main circuit unit (301) consisting of a common gate circuit having a drain terminal through which an input signal (IN) is output as an output signal, an assistant circuit unit (302) having a common gate circuit in order to assist the linearity of the main circuit unit (301), a biasing unit (biasing circuit) for biasing the main circuit unit (301) and the assistant circuit unit (302), respectively, and load stages (load impedance) connected to output stages of the main circuit unit (301) and the assistant circuit unit (302), wherein the output stages of the main circuit unit and the assistant circuit unit are coupled to each other.
摘要:
The present invention relates to improved linearity of an active circuit, and more particularly, to an active circuit having improved linearity using a main circuit unit (301) and an assistant circuit unit (302). According to the present invention, the common gate circuit includes a main circuit unit (301) consisting of a common gate circuit having a drain terminal through which an input signal (IN) is output as an output signal, an assistant circuit unit (302) having a common gate circuit in order to assist the linearity of the main circuit unit (301), a biasing unit (biasing circuit) for biasing the main circuit unit (301) and the assistant circuit unit (302), respectively, and load stages (load impedance) connected to output stages of the main circuit unit (301) and the assistant circuit unit (302), wherein the output stages of the main circuit unit and the assistant circuit unit are coupled to each other.
摘要:
The present invention relates to a receiver chip used in a Digital Video Broadcasting (DVB) receiver, and more particularly, to a Digital Video Broadcasting-Handheld (DVB-H) receiver chip employing a diversity scheme. In the DVB-H receiver chip according to the present invention, a first receiver block 101 and a second receiver block 102 isolated from the first receiver block are packaged within one receiver chip. An I/O terminal of the first receiver block 101 is connected to an external pin of one side 120 of the receiver chip, and an I/O terminal of the second receiver block 102 is connected to an external pin of a side 130 opposite to the one side 120 of the receiver chip. A source terminal or a control terminal of the first or second receiver block 101 or 102 is connected to the external pin of one or more of the one side 120 or the other sides 110 and 140 of the receiver chip. The first receiver block 101 comprises a first Low-Noise Amplifier (LNA) 311, a first mixer 312, a first filter 313 and a first a Variable Gain Amplifier (VGA) 314. The second receiver block 102 comprises a second LNA 321, a second mixer 322, a second filter 323 and a second VGA 324. A Voltage-Controlled Oscillator (VCO) supplies a frequency to the first and second mixers 312 and 322.