公开(公告)号：EP2223581B1

公开(公告)日：2014-09-17

申请号：EP08862410.1

申请日：2008-10-29

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： VERILHAC, Jean-Marie ,  BABLET, Jacqueline ,  BORY, Cécile

IPC: H05K3/46 ,  H01L21/768 ,  H05K3/40 ,  H05K3/00

CPC classification number: H05K3/4084 ,  H01L21/76885 ,  H05K3/0017 ,  H05K3/4647 ,  H05K3/4664 ,  H05K2201/091 ,  H05K2201/09909 ,  H05K2203/107 ,  H05K2203/1173 ,  H05K2203/128

公开(公告)号：EP2731411A2

公开(公告)日：2014-05-14

申请号：EP13192198.3

申请日：2013-11-08

Applicant: Samsung Display Co., Ltd.

Inventor： Lee, Jin-Suk

IPC: H05K3/36 ,  H05K1/11 ,  H05K3/32

CPC classification number: H05K1/117 ,  H01R12/52 ,  H05K1/0248 ,  H05K1/118 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09709 ,  H05K2201/09909

Abstract: A connection structure of circuit boards is disclosed. In one aspect, the connection structure includes a first circuit board 100, a second circuit board 200 and an adhesive member 150. A first connection pad 110 and a second connection pad 120 are disposed on the first circuit board. The second circuit board has a first surface 200a facing the first circuit board. A plurality of third connection pads 210 and fourth connection pads 220 are disposed on the first surface of the second circuit board in a staggered pattern. The adhesive member is disposed between the first and second circuit boards. At least one of the third and fourth connection pads is electrically connected to a wire 270 which is disposed on a second surface 200b of the second circuit board opposite to the first surface of the second circuit board.

Abstract translation: 公开了电路板的连接结构。 在一个方面，连接结构包括第一电路板100，第二电路板200和粘合构件150.第一连接焊盘110和第二连接焊盘120设置在第一电路板上。 第二电路板具有面向第一电路板的第一表面200a。 多个第三连接焊盘210和第四连接焊盘220以交错图案设置在第二电路板的第一表面上。 粘合剂构件设置在第一和第二电路板之间。 第三和第四连接焊盘中的至少一个电连接到布线270，线270设置在与第二电路板的第一表面相对的第二电路板的第二表面200b上。

公开(公告)号：EP1571894B1

公开(公告)日：2011-11-16

申请号：EP03809838.0

申请日：2003-07-15

Applicant: Daisho Denshi Co. Ltd.

Inventor： ISHIKAWA, Atsushi, c/o Daisho Denshi Co., Ltd. ,  DEGUCHI, Osamu, c/o Daisho Denshi Co., Ltd. ,  KAMEYAMA, Katsuyoshi, c/o Daisho Denshi Co., Ltd. ,  NAGAOKA, Makoto, c/o Daisho Denshi Co., Ltd. ,  KIMURA, Akihiro, c/o Daisho Denshi Co., Ltd.

IPC: H05K13/02

CPC classification number: H05K13/0069 ,  H05K1/0393 ,  H05K3/0058 ,  H05K3/386 ,  H05K2201/015 ,  H05K2201/09909 ,  H05K2203/016 ,  Y10S269/903 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/5313 ,  Y10T29/53265

Abstract: A holding/convey jig having a plate surface provided with an adhesive pattern of low adhesion for placing and holding a printed circuit board having a conductive portion and a non-conductive portion. The adhesive pattern of low adhesion is formed only at a position corresponding to the non-conductive portion. Moreover, there is disclosed a holding/convey jig having a plate surface provided with a fluorine-based resin layer for placing and holding a printed circuit board having a conductive pattern on an insulating substrate surface. The fluorine-based resin layer has such a structure that the conductive pattern surface of the printed circuit board is held substantially parallel to the plate surface. The holding/convey jig can suppress a manufacturing defect in the step of agglutinating an electronic part onto the thin-plate printed circuit board or in the step of manufacturing the printed circuit board and reduce the manufacturing cost.

Abstract translation: 一种保持/运送夹具，其具有板表面，该板表面设置有低粘附性的粘合剂图案，用于放置和保持具有导电部分和非导电部分的印刷电路板。 低粘附力的粘合剂图案仅在与非导电部分对应的位置处形成。 此外，公开了一种具有板表面的保持/传送夹具，该板表面设置有用于在绝缘基板表面上放置和保持具有导电图案的印刷电路板的氟基树脂层。 氟基树脂层具有这样的结构，即印刷电路板的导电图案表面保持基本上平行于板表面。 保持/传送夹具可以抑制在将电子部件粘合到薄板印刷电路板上的步骤中或制造印刷电路板的步骤中的制造缺陷，并降低制造成本。

公开(公告)号：EP2134147A3

公开(公告)日：2011-04-13

申请号：EP09161821.5

申请日：2009-06-03

Applicant: Valeo Equipements Electriques Moteur

Inventor： Mandion, Thierry ,  Chemin, Michaël

IPC: H05K3/34

CPC classification number: H05K3/3421 ,  H01L2924/0002 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/303 ,  H05K3/3452 ,  H05K2201/0979 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/09918 ,  H05K2201/10166 ,  H05K2203/166 ,  Y02P70/613 ,  H01L2924/00

Abstract: L'invention concerne un procédé de positionnement d'un circuit intégré (3) du type dit à montage en surface, notamment du type "D 2 PAK-7", et de soudure sur un substrat à plages métallisées isolées (50 à 52). Typiquement les plages métallisées isolées sont en cuivre et ont une épaisseur supérieure ou égale à 50 microns. La distance séparant (L 7 ) les plages métallisées sous-jacentes aux broches de grille (31) et de première source (32) étant critique, cette distance est rendue égale à celle séparant les deux broches (31, 32). Pour pouvoir opérer un positionnement et un alignement optiques des broches (31 à 33, 35 à 37) par rapport aux plages métallisées (50 à 52), on dépose entre les paires de broches des bandes (40 à 43) de vernis isolant formant repères d'index.

公开(公告)号：EP1942709B1

公开(公告)日：2010-11-17

申请号：EP08100004.4

申请日：2008-01-02

Applicant: Samsung Mobile Display Co., Ltd.

Inventor： Chung, Jaemo ,  Kim, Sunghwan ,  Sung, Jinhee

IPC: H05K1/18 ,  H05K1/02 ,  G02B6/00 ,  G02F1/13

CPC classification number: H05K1/0274 ,  G02F1/133615 ,  G02F1/13452 ,  H05K1/189 ,  H05K3/28 ,  H05K2201/0112 ,  H05K2201/09909 ,  H05K2201/10106 ,  H05K2201/10522

公开(公告)号：EP2223581A1

公开(公告)日：2010-09-01

申请号：EP08862410.1

申请日：2008-10-29

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： VERILHAC, Jean-Marie ,  BABLET, Jacqueline ,  BORY, Cécile

IPC: H05K3/46

CPC classification number: H05K3/4084 ,  H01L21/76885 ,  H05K3/0017 ,  H05K3/4647 ,  H05K3/4664 ,  H05K2201/091 ,  H05K2201/09909 ,  H05K2203/107 ,  H05K2203/1173 ,  H05K2203/128

Abstract: The invention relates to a method for making an electric interconnection between two conducting layers (2, 5) separated by at least one insulation or semi-conducting layer (4), that comprises forming a stud (3) extending at least between the lower conducting layer (2) and the upper conducting layer (5), wherein the nature and/or the shape of said stud impart non-wettability properties to said stud relative to the material used for the separating layer (4).

公开(公告)号：EP2174324A1

公开(公告)日：2010-04-14

申请号：EP07872304.6

申请日：2008-03-18

Applicant: Fry's Metals, Inc.

Inventor： KHASELEV, Oscar ,  DESAI, Nitin ,  MARCZI, Michael, T. ,  SINGH, Bawa

IPC: H01F5/00

CPC classification number: H01F5/003 ,  B22F2998/00 ,  C09D11/52 ,  H01L51/0022 ,  H05K3/1241 ,  H05K3/1258 ,  H05K3/38 ,  H05K2201/098 ,  H05K2201/09909 ,  H05K2203/0568 ,  H05K2203/0769 ,  H05K2203/1105 ,  H05K2203/1131 ,  H05K2203/1476 ,  B22F1/0062

Abstract: Conductive patterns and methods of using and printing such conductive patterns are disclosed. In certain examples, the conductive patterns may be produced by disposing a conductive material between supports on a substrate. The supports may be removed to provide conductive patterns having a desired length and/or geometry.

Abstract translation: 公开了使用和印刷这种导电图案的导电图案和方法。 在某些示例中，导电图案可以通过将导电材料设置在衬底上的支撑物之间来产生。 支撑件可被移除以提供具有期望长度和/或几何形状的导电图案。

公开(公告)号：EP2160082A1

公开(公告)日：2010-03-03

申请号：EP08752683.6

申请日：2008-05-14

Applicant: Denki Kagaku Kogyo Kabushiki Kaisha

Inventor： MIYAKAWA, Takeshi ,  MIYATA, Kenji ,  NISHI, Taiki ,  OKAJIMA, Yoshihiko

IPC: H05K1/05 ,  F21V7/00 ,  F21V7/22

CPC classification number: H05K1/0274 ,  H01L33/60 ,  H05K1/056 ,  H05K3/28 ,  H05K2201/0209 ,  H05K2201/0227 ,  H05K2201/0266 ,  H05K2201/0338 ,  H05K2201/09909 ,  H05K2201/10106 ,  H05K2201/2054

Abstract: Provided is a metal base circuit board having a new function of a light reflection in addition to the conventional printed circuit board function for mounting electronic parts. The metal base circuit board has a circuit arranged on a metal plate via an insulation layer. A white film is arranged at least one the insulation layer.

Abstract translation: 提供了除了用于安装电子部件的传统印刷电路板功能之外，具有光反射的新功能的金属基底电路板。 金属基电路板具有通过绝缘层布置在金属板上的电路。 绝缘层至少布置有白色膜。

公开(公告)号：EP2119749A1

公开(公告)日：2009-11-18

申请号：EP09156742.0

申请日：2009-03-30

Applicant: Palo Alto Research Center Incorporated

Inventor： Fork, David K. ,  Rao, Ranjeet ,  Benner, Frank

IPC: C09D11/10 ,  B29C47/04

CPC classification number: H05K3/101 ,  C09D11/101 ,  C09D11/40 ,  H01L21/4867 ,  H05K1/097 ,  H05K3/1241 ,  H05K2201/09909 ,  H05K2203/0126 ,  Y10T428/26

Abstract: Improved coextruded ribbons of material, such as can be used for making relatively fine conductive or ceramic lines or structures, having relatively high aspect ratios, are provided. The inks used to form the coextruded structures lack a yield stress and a high viscosity, but react at their interface to form a material having a finite yield stress or a high viscosity. This material then supports the shape of the extruded ink such that structures can be formed therefrom.

Abstract translation: 提供了改进的共挤出的材料带，例如可用于制造具有相对较高纵横比的相对精细的导电或陶瓷线或结构。 用于形成共挤出结构的油墨缺乏屈服应力和高粘度，但在其界面处反应形成具有有限屈服应力或高粘度的材料。 然后该材料支撑挤出墨水的形状，使得可以由此形成结构。

公开(公告)号：EP1684560A3

公开(公告)日：2009-01-21

申请号：EP06075019.7

申请日：2006-01-06

Applicant: Delphi Technologies, Inc.

Inventor： Kulhman, Frederick F. ,  Duff, Brentt C. ,  Pepples, Michael J.

IPC: H05K1/18 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H05K1/181 ,  H05K3/3442 ,  H05K3/3489 ,  H05K2201/09772 ,  H05K2201/09909 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic assembly (200) includes a substrate (10) and at least one surface mounted electronic component (14). The substrate (10) includes a first side and a second side opposite the first side. The first side of the substrate (10) includes a plurality of conductive traces formed thereon. The plurality of conductive traces includes a first conductive trace (18A) and a second conductive trace (18B). The electronic component (14) is electrically coupled between the first and second conductive traces (18A,18B). A component body of the electronic component (14) is subject to interaction with a flux, which is utilized during electrical coupling of the electronic component (14) to the first and second conductive traces (18A,18B), to form a current leakage path. The substrate (10) is configured to prevent the formation of the current leakage path.

Abstract translation: 电子组件（200）包括衬底（10）和至少一个表面安装的电子部件（14）。 衬底（10）包括第一侧和与第一侧相对的第二侧。 衬底（10）的第一侧包括形成在其上的多个导电迹线。 多个导电迹线包括第一导电迹线（18A）和第二导电迹线（18B）。 电子组件（14）电耦合在第一和第二导电迹线（18A，18B）之间。 电子部件（14）的部件主体与在电子部件（14）与第一和第二导电迹线（18A，18B）电耦合期间利用的通量相互作用，以形成电流泄漏路径 。 衬底（10）被配置为防止形成电流泄漏路径。