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    PRINTED CIRCUIT BOARD AND DISPLAY APPARATUS INCLUDING THE SAME
    2.
    发明公开
    PRINTED CIRCUIT BOARD AND DISPLAY APPARATUS INCLUDING THE SAME 审中-公开
    LEITERPLATTE UND ANZEIGEVORRICHTUNG DAMIT

    公开(公告)号：EP3177116A1

    公开(公告)日：2017-06-07

    申请号：EP16201867

    申请日：2016-12-02

    Applicant: SAMSUNG DISPLAY CO LTD

    Inventor： KIM BYOUNGYONG ,  YEO INSEOK ,  JANG EUIYUN ,  LEE SANGJUN ,  HWANG JEONGHO

    IPC: H05K1/11 ,  H05K1/14

    CPC classification number: H05K1/113 ,  H05K1/111 ,  H05K1/118 ,  H05K1/147 ,  H05K1/181 ,  H05K2201/05 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/09481 ,  H05K2201/09709 ,  H05K2201/10128 ,  H05K2201/10545 ,  Y02P70/611

    Abstract: Provided is a printed circuit board including a base substrate, first row pads, and second row pads. The base substrate has two sides, that can be adjacent, respectively extending in first and second directions. A plurality of pad group areas successively positioned along the first direction are defined on the base substrate. The first row pads are respectively disposed within the pad group areas and successively positioned along a third direction. The second row pads are respectively disposed within the pad group areas, successively positioned along the third direction, and spaced apart from the first row pads. Each of the second row pads is a predetermined distance from a corresponding one of the first row pads in the second direction.

    Abstract translation: 提供了一种印刷电路板，其包括基底，第一行垫和第二行垫。 基础衬底具有两个侧面，这两个侧面可以相邻，分别在第一和第二方向上延伸。 在基板上限定了沿第一方向连续放置的多个焊盘组区域。 第一行垫分别设置在焊盘组区域内并沿着第三方向连续定位。 第二行垫分别设置在焊盘组区域内，沿着第三方向连续定位，并与第一行焊盘间隔开。 每个第二行垫在第二方向上与相应的第一行垫的预定距离。

    WIRING BOARD
    7.
    发明公开
    WIRING BOARD 审中-公开
    LEITERPLATINE

    公开(公告)号：EP2927950A1

    公开(公告)日：2015-10-07

    申请号：EP13858236.6

    申请日：2013-05-27

    Applicant: NGK Spark Plug Co., Ltd.

    Inventor： WADA, Hidetoshi ,  ITO, Tatsuya ,  NAGAI, Makoto

    IPC: H01L23/12 ,  H05K3/46

    CPC classification number: H05K1/11 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49844 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2203/0594 ,  H05K2203/0597 ,  H01L2924/00

    Abstract: Provided is a wiring substrate which allows connection terminals to be disposed at high density, can increase the degree of freedom of wiring layout, and can enhance the reliability of connection of the connection terminals. A wiring substrate of the present invention includes a laminate which includes one or more insulating layers and one or more conductor layers laminated together; a wiring formed on the laminate; a columnar connection terminal which is formed directly on the wiring and is in contact with at least one of opposite side surfaces of the wiring; and a solder resist layer which covers the wiring and which exposes at least a portion of the connection terminal. The width of the wiring at a position at which the connection terminal is formed is smaller than the length of the connection terminal in the width direction.

    Abstract translation: 提供了一种允许以高密度设置连接端子的布线基板，可以增加布线布局的自由度，并且可以提高连接端子的连接的可靠性。 本发明的布线基板包括一层叠体，其包括一层或多层绝缘层和层叠在一起的一层或多层导体层; 形成在层压板上的布线; 柱状连接端子，其直接形成在布线上并且与布线的相对侧表面中的至少一个相接触; 以及覆盖所述布线并且暴露所述连接端子的至少一部分的阻焊层。 形成连接端子的位置的布线的宽度小于连接端子在宽度方向上的长度。

    Electronic circuit unit
    9.
    发明公开
    Electronic circuit unit 有权
    Elektronische Schaltkreiseinheit

    公开(公告)号：EP2278863A1

    公开(公告)日：2011-01-26

    申请号：EP10165403.6

    申请日：2010-06-09

    Applicant: Alps Electric Co., Ltd.

    Inventor： Kawai, Satoshi

    IPC: H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/116 ,  H05K1/0224 ,  H05K1/113 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/0723 ,  H05K2201/093 ,  H05K2201/09454 ,  H05K2201/0969 ,  H05K2201/09709

    Abstract: An electronic circuit unit (1) includes a multi-layer substrate (2) in which high frequency circuits (3,4) are provided on two different layers and a ground layer (5) is formed between the two layers, and grounding lands (6) connected to peripheral conductive members through connection bars (6a) formed on a plurality of layers of the multi-layer substrate (2). The grounding lands (6) are connected to each other through a via hole (8) and conducted to the ground layer (5), and the connection bars (6a) protruding radially outward from at least two grounding lands (6) provided on different layers are arranged in different directions with respect to a circumferential direction such that the connection bars (6a) do not overlap each other along a thickness direction of the multi-layer substrate (2).

    Abstract translation: 电子电路单元（1）包括多层基板（2），其中高频电路（3,4）设置在两个不同的层上，并且在两层之间形成接地层（5）和接地层 6）通过形成在所述多层基板（2）的多个层上的连接杆（6a）连接到外围导电构件。 接地平台（6）通过通孔（8）彼此连接并传导到接地层（5），并且连接杆（6a）从设置在不同的接地平台（6）上的至少两个接地台（6）径向向外突出 层相对于周向布置在不同的方向上，使得连接杆（6a）沿着多层基板（2）的厚度方向彼此不重叠。

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