BARRIER MODULATING TRANSISTOR
    31.
    发明公开

    公开(公告)号:EP4113625A1

    公开(公告)日:2023-01-04

    申请号:EP22181437.9

    申请日:2022-06-28

    摘要: A transistor comprises a semiconductor substrate and a barrier metal layer forming a Schottky barrier. One or more insulated gates may be positioned adjacent to an edge of the Schottky barrier. By applying a reverse bias voltage between the semiconductor substrate and the barrier metal, and applying a gate voltage between the one or more insulated gates and the barrier metal, a reverse bias current may be increased to a reverse bias conducting state. When the gate voltage is sufficient, the transistor may conduct current between the semiconductor substrate and the barrier metal. For example, voltages may be applied to an n-type substrate and an insulated gate (both relative to the barrier metal), and a current may flow from the semiconductor substrate to the barrier metal. The transistor may operate as a switch, a filter, a rectifier, an oscillator, or an amplifier.

    ADJUSTABLE FIELD EFFECT RECTIFIER
    38.
    发明公开
    ADJUSTABLE FIELD EFFECT RECTIFIER 审中-公开
    可调场效应整流器

    公开(公告)号:EP2232559A4

    公开(公告)日:2012-08-01

    申请号:EP08833488

    申请日:2008-09-25

    IPC分类号: H01L29/861 H01L21/334

    摘要: A rectifier building block has four electrodes: source, drain, gate and probe. The main current flows between the source and drain electrodes. The gate voltage controls the conductivity of a narrow channel under a MOS gate and can switch the RBB between OFF and ON states. Used in pairs, the RBB can be configured as a three terminal half-bridge rectifier which exhibits better than ideal diode performance, similar to synchronous rectifiers but without the need for control circuits. N-type and P-type pairs can be configured as a full bridge rectifier. Other combinations are possible to create a variety of devices.

    TRENCH WIDENING WITHOUT MERGING
    40.
    发明公开
    TRENCH WIDENING WITHOUT MERGING 审中-公开
    抓斗没有扩展公司合并

    公开(公告)号:EP2022096A2

    公开(公告)日:2009-02-11

    申请号:EP07729217.5

    申请日:2007-05-16

    IPC分类号: H01L29/94 H01L21/334

    CPC分类号: H01L29/945 H01L29/66181

    摘要: A semiconductor fabrication method comprises steps of providing a semiconductor structure. The semiconductor structure includes a semiconductor substrate, a trench in the semiconductor substrate. The trench comprises a side wall which includes {100} side wall surfaces and {110} side wall surfaces. The semiconductor structure further includes a blocking layer on the {100} side wall surfaces and the {110} side wall surfaces. The method further comprises the steps of removing portions of the blocking layer on the {110} side wall surfaces without removing portions of the blocking layer on the {100} side wall surfaces such that the {110} side wall surfaces are exposed to a surrounding ambient.