公开(公告)号：EP2775480B1

公开(公告)日：2018-11-14

申请号：EP13290046.5

申请日：2013-03-07

Applicant: Crocus Technology S.A.

Inventor： Stainer, Quentin

IPC: G11C11/16 ,  H01L43/02 ,  H01L43/08

CPC classification number: G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/08

Abstract: Self-referenced magnetic random access memory (MRAM) cell (1) comprising a magnetic tunnel junction (2) including a sense layer (21); a storage layer (23) having a storage magnetization (230); a tunnel barrier layer (22) comprised between the sense and the storage layers (21, 23); and an antiferromagnetic layer (24) exchange-coupling the storage layer (23) such that the storage magnetization (230) can be pinned when the antiferromagnetic layer (24) is below a critical temperature and freely varied when the antiferromagnetic layer (24) is heated at or above the critical temperature; said sense layer (21) comprising a first sense layer (211) having a first sense magnetization (213), a second sense layer (212) having a second sense magnetization (214) and spacer layer (215) between the first and second sense layers (211, 212). The MRAM cell can be read with low power consumption.

公开(公告)号：EP3394910A1

公开(公告)日：2018-10-31

申请号：EP16880168.6

申请日：2016-12-23

Applicant: INTEL Corporation

Inventor： MANIPATRUNI, Sasikanth ,  YOUNG, Ian A. ,  NIKONOV, Dmitri E. ,  AVCI, Uygar E. ,  MORROW, Patrick ,  CHAUDHRY, Anurag

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

CPC classification number: H03K19/0002 ,  H03K19/18 ,  H03K19/20

Abstract: Described is an apparatus which comprises: a 4-state input magnet; a first spin channel region adjacent to the 4-state input magnet; a 4-state output magnet; a second spin channel region adjacent to the 4-state input and output magnets; and a third spin channel region adjacent to the 4-state output magnet. Described in an apparatus which comprises: a 4-state input magnet; a first filter layer adjacent to the 4-state input magnet; a first spin channel region adjacent to the first filter layer; a 4-state output magnet; a second filter layer adjacent to the 4-state output magnet; a second spin channel region adjacent to the first and second filter layers; and a third spin channel region adjacent to the second filter layer.

公开(公告)号：EP2862172B1

公开(公告)日：2018-10-24

申请号：EP13807860.5

申请日：2013-06-06

Applicant: Micron Technology, Inc.

Inventor： KULA, Witold ,  SANDHU, Gurtej S. ,  KRAMER, Stephen J.

IPC: H01L43/08 ,  H01L43/12 ,  H01L43/02

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/228 ,  H01L43/02 ,  H01L43/12

Abstract: Methods of forming magnetic memory cells are disclosed. Magnetic and non-magnetic materials are formed into a primal precursor structure in an initial stress state of essentially no strain, compressive strain, or tensile strain. A stress-compensating material, e.g., a non-sacrificial, conductive material, is formed to be disposed on the primal precursor structure to form a stress-compensated precursor structure in a net beneficial stress state. Thereafter, the stress-compensated precursor structure may be patterned to form a cell core of a memory cell. The net beneficial stress state of the stress-compensated precursor structure lends to formation of one or more magnetic regions, in the cell core, exhibiting a vertical magnetic orientation without deteriorating a magnetic strength of the one or more magnetic regions. Also disclosed are memory cells, memory cell structures, semiconductor device structures, and spin torque transfer magnetic random access memory (STT-MRAM) systems.

公开(公告)号：EP3353826A1

公开(公告)日：2018-08-01

申请号：EP15904968.3

申请日：2015-09-25

Applicant: INTEL Corporation

Inventor： OGUZ, Kaan ,  O'BRIEN, Kevin P. ,  WIEGAND, Christopher J. ,  RAHMAN, MD Tofizur ,  DOYLE, Brian S. ,  DOCZY, Mark L. ,  GOLONZKA, Oleg ,  GHANI, Tahir ,  BROCKMAN, Justin S.

IPC: H01L43/10 ,  H01L43/02

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01F10/30 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3286 ,  H01F10/329 ,  H01F41/302 ,  H01F41/303 ,  H01L27/222 ,  H01L43/10 ,  H01L43/12

Abstract: MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such pSTTM devices. In some embodiments, perpendicular MTJ material stacks include one or more electrode interface material layers disposed between a an electrode metal, such as TiN, and a seed layer of an antiferromagnetic layer or synthetic antiferromagnetic (SAF) stack. The electrode interface material layers may include either or both of a Ta material layer or CoFeB material layer. In some Ta embodiments, a Ru material layer may be deposited on a TiN electrode surface, followed by the Ta material layer. In some CoFeB embodiments, a CoFeB material layer may be deposited directly on a TiN electrode surface, or a Ta material layer may be deposited on the TiN electrode surface, followed by the CoFeB material layer.

公开(公告)号：EP3347927A1

公开(公告)日：2018-07-18

申请号：EP16767108.0

申请日：2016-09-07

Applicant: Headway Technologies, Inc.

Inventor： LIU, Huanlong ,  LEE, Yuan-Jen ,  ZHU, Jian ,  JAN, Guenole ,  TONG, Ruth ,  THOMAS, Luc

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L43/02

Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer has an interface with a tunnel barrier and a second interface with a metal oxide layer to promote perpendicular magnetic anisotropy (PMA) therein. A diffusion barrier is formed on a side of the metal oxide layer opposite the second interface to prevent non-magnetic metals in a hard mask or electrode from migrating to the second interface and degrading free layer PMA. A second diffusion barrier may be formed between a second electrode and a reference layer. The diffusion barrier may be a single layer of SiN, TiN, TaN, Mo, or CoFeX where X is Zr, P, B, or Ta, or is a multilayer such as CoFeX/Mo wherein CoFeX contacts the metal oxide layer and Mo adjoins a hard mask. As a result, coercivity is maintained or increased in the MTJ after annealing at 400° C. for 30 minutes.

公开(公告)号：EP3198598A4

公开(公告)日：2018-07-18

申请号：EP14902862

申请日：2014-09-25

Applicant: INTEL CORP

Inventor： KHAN ASIF ,  MANIPATRUNI SASIKANTH ,  NIKONOV DMITRI E ,  KIM RASEONG ,  GHANI TAHIR ,  YOUNG IAN A

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

CPC classification number: H01L27/228 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  H01L27/20 ,  H01L41/20 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: Described is an apparatus which comprises: a magnetic tunneling junction (MTJ) having a free magnetic layer; a piezoelectric layer; and a conducting strain transfer layer coupled to the free magnetic layer and the piezoelectric layer. Described is a method, which comprises: exciting a piezoelectric layer with a voltage driven capacitive stimulus; and writing to a MTJ coupled to the piezoelectric layer via a strain assist layer. Described is also an apparatus which comprises: a transistor; a conductive strain transfer layer coupled to the transistor; and a MTJ device having a free magnetic layer coupled to the conductive strain transfer layer.

公开(公告)号：EP3323158A1

公开(公告)日：2018-05-23

申请号：EP16824930.8

申请日：2016-07-08

Applicant: Micron Technology, Inc.

Inventor： HARMS, Jonathan, D. ,  CHEN, Wei ,  MURTHY, Sunil, S.

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L43/08

Abstract: Some embodiments include a magnetic tunnel junction comprising magnetic reference material having an iridium-containing region between a multi-layer stack and a polarizer region. Some embodiments include a magnetic tunnel junction having a conductive first magnetic electrode which contains magnetic recording material, a conductive second magnetic electrode spaced from the first electrode and which contains magnetic reference material, and a non-magnetic insulator material between the first and second electrodes. The magnetic reference material of the second electrode includes a first region containing a stack of cobalt alternating with one or more of platinum, palladium and nickel; includes an iridium-containing second region over the first region; and includes a cobalt-containing third region over the second region. The third region is directly against the non-magnetic insulator material.

公开(公告)号：EP3311425A1

公开(公告)日：2018-04-25

申请号：EP15895816.5

申请日：2015-06-19

Applicant: Intel Corporation

Inventor： LAMBORN, Daniel R. ,  GOLONZKA, Oleg ,  WIEGAND, Christopher J. ,  HEIL, Philip E. ,  RAHMAN, MD Tofizur ,  CASTELLANO, Rebecca J. ,  BANSAL, Tarun

IPC: H01L43/02 ,  H01L43/08

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L27/226 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: An embodiment includes an apparatus comprising: a magnetic tunnel junction (MTJ), between first and second electrodes, comprising a dielectric layer between fixed and free layers; a dielectric film directly contacting sidewalls of the first electrode; and a metallic layer coupled to the side-walls via the dielectric film; wherein (a) a vertical axis intersects the first and second electrodes and the MTJ but not the metallic layer, (b) a first horizontal axis intersects the metallic layer, the dielectric film, and the first electrode; and (c) a second horizontal axis, between the first horizontal axis and the MTJ, intersects the dielectric film and the first electrode but not the capping layer. Other embodiments are described herein.

公开(公告)号：EP3298636A1

公开(公告)日：2018-03-28

申请号：EP16812075.6

申请日：2016-03-10

Applicant: Spin Transfer Technologies Inc.

Inventor： PINARBASI, Mustafa Michael ,  TZOUFRAS, Michail ,  KARDASZ, Bartlomiej Adam

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/10

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device utilizes a precessional spin current (PSC) magnetic layer in conjunction with a perpendicular MTJ where the in-plane magnetization direction of the PSC magnetic layer is free to rotate.

公开(公告)号：EP3292571A1

公开(公告)日：2018-03-14

申请号：EP16789703.2

申请日：2016-01-21

Applicant: Micron Technology, Inc.

Inventor： SIDDIK, Manzar

IPC: H01L43/10 ,  H01L43/02 ,  H01L43/08

CPC classification number: H01L43/10 ,  G11B5/127 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08

Abstract: A magnetic tunnel junction comprises a conductive first magnetic electrode comprising magnetic recording material. A conductive second magnetic electrode is spaced from the first electrode and comprises magnetic reference material. A non-magnetic tunnel insulator material is between the first and second electrodes. The magnetic recording material of the first electrode comprises a first crystalline magnetic region, in one embodiment comprising Co and Fe. In one embodiment, the first electrode comprises a second amorphous region comprising amorphous XN, where X is one or more of W, Mo, Cr, V, Nb, Ta, Al, and Ti. In one embodiment, the first electrode comprises a second region comprising Co, Fe, and N.