公开(公告)号：EP3462619A1

公开(公告)日：2019-04-03

申请号：EP18191154.6

申请日：2018-08-28

申请人： NXP USA, Inc.

发明人： Braswell, Brandt ,  Kunnen, George Rogers

IPC分类号： H03M3/00 ,  H03M1/74

摘要： A digital to analog converter (DAC) circuit includes pulse generator circuit for generating voltage pulses having a predetermined length and shape. The voltage pulses are used to control the generation of current pulses generated by a voltage to current converter. The voltage to current converter includes a set of switchable resistors where the resistance value provided by the set is dependent upon a digital value of a digital signal. In some embodiments, the current amplitude of the current pulses is dependent upon the resistance value and is indicative of the digital value.

公开(公告)号：EP3442123A1

公开(公告)日：2019-02-13

申请号：EP18186255.8

申请日：2018-07-30

申请人： NXP USA, Inc.

发明人： Pietri, Stefano ,  Feddeler, James Robert ,  Berens, Michael Todd ,  Zhang, Yizhong

IPC分类号： H03M1/68 ,  H03M1/74 ,  H03M1/76 ,  H03M1/78 ,  H03M1/80

摘要： A digital to analog converter (DAC) includes a first sub-DAC configured to convert most significant bits (MSBs) of digital input data, the first sub-DAC including a first array of resistors, a second sub-DAC configured to convert at least some least significant bits (LSBs) of the digital input data, the second sub-DAC including a second array of resistors, and a first scaling resistor connected between the first and second sub-DACs, wherein the first scaling resistor has a resistance value that is based on the number of resistors in the second sub-DAC.

公开(公告)号：EP3439181A1

公开(公告)日：2019-02-06

申请号：EP18185620.4

申请日：2018-07-25

申请人： NXP USA, Inc.

发明人： Kabir, Mohammad Nizam ,  Hoseini, Mariam ,  Braswell, Brandt

IPC分类号： H03M1/06 ,  H03M1/10 ,  H03M1/74 ,  H03M1/68

摘要： A digital to analog converter convert digital data in binary format to thermometer bit vectors. A first set of the thermometer bit vectors corresponds to most significant bits of the digital data and a second set of the thermometer bit vectors corresponds to least significant bits of the digital data. Connections of first current sources corresponding to the first set of the thermometer bit vectors and second current sources corresponding to the second set of the thermometer bit vectors are dynamically and randomly alternated to a first output line and a second output line. Calibration current is applied to the second current sources so a total current of the second current sources and the calibration current is within a predetermined range of an average current of the first current sources.

公开(公告)号：EP2965431B1

公开(公告)日：2018-08-15

申请号：EP14713304.5

申请日：2014-03-04

申请人： Qualcomm Incorporated

发明人： SEO, Dongwon ,  LEE, Sang Min

IPC分类号： H03M1/08 ,  H03M1/68 ,  H03M1/74 ,  H03M1/78

CPC分类号： H03M1/785 ,  H03M1/0863 ,  H03M1/687 ,  H03M1/747

摘要： An N-bit digital-to-analog converter (DAC) includes N input stages each of which generates the same amount of current and includes a pair of similarly sized transistor switches responsive to differential bits. The 2M−1 input stages associated with the M most significant bits of the DAC are connected in parallel and deliver their currents differentially to the DAC's current summing nodes. Each of the remaining (N−M) stages includes a resistive network that supplies a current defined by a binary weight of the stage's bit position within the DAC. The (N−M) stages deliver their currents to the current summing nodes differentially. The DAC further includes an impedance attenuator adapted to maintain the impedance of the current summing nodes and the voltage difference between the current summing nodes within a range defined by a gain of a differential amplifier disposed in the impedance attenuator.

公开(公告)号：EP2926459B1

公开(公告)日：2018-03-14

申请号：EP13859273.8

申请日：2013-11-20

申请人： Analog Devices, Inc.

发明人： NGUYEN, Khiem, Quang ,  ADAMS, Robert

IPC分类号： H03M1/06 ,  H03M1/74

CPC分类号： H03M1/66 ,  H03M1/0668 ,  H03M1/067 ,  H03M1/74 ,  H03M3/464

摘要： A multi-bit digital to analog converter comprising a plurality of unit cells, each providing an electrical signal to a common output at multiple levels in response to a respective control signal and a control system having multiple layers of branch circuits. Each branch circuit comprises a dynamic element matching circuit receiving a plurality of least significant bits of an input code to generate respective output signals to the control system and a plurality of branches, each receiving most significant bits of an input code to the respective layer and having an adder for the most significant bits of the layer's input signal and a respective output from the dynamic element matching circuit. An input signal to the digital to analog converter is input to a first layer as that layer's input code, input codes of the other layers are taken from output signals of preceding layers, and output signals of a last layer may be input to the unit cells as control signals.

公开(公告)号：EP3182585A1

公开(公告)日：2017-06-21

申请号：EP15199768.1

申请日：2015-12-14

申请人： Panthronics AG

发明人： Crols, Jan ,  Gabriels, Steven ,  Jongsma, Jakob

IPC分类号： H03F3/21 ,  H03F3/195 ,  H03M1/74

摘要： A Digital power amplifier (13) to drive an RFID antenna (10) with a substantial sinusoidal output current (I) which digital power amplifier (13) comprises:
an integrated circuit (IC2) with a first transmission output pin (15) and a second transmission output pin (16) to provide an output signal (17);
an adaption circuit (14) of discrete components (C2a, C2b) connected to the first and second transmission output pin (15, 16) to adapt the output signal (17) and feed the substantial sinusoidal output current (1) with a transmission resonance frequency to the RFID antenna (10), wherein the integrated circuit (IC2) comprises:
a digital control section (19) with a number ofN wave-forming contacts (20) to output a digital wave-forming bit combination of N bits with a clock frequency M-times the transmission resonance frequency;
a number ofN driver blocks (21) each connected with a first contact (22) to one of the wave-forming contacts (20) and a number of N/2 of them connected with a second contact to the first transmission output pin (15) and the other number of N/2 of them connected with their second contact to the second transmission output pin (16), which driver blocks (21) are built to provide increments of the substantial sinusoidal output current (I) to the first and second transmission output pin (15, 16).

摘要翻译： 一种数字功率放大器（13），用于驱动具有基本正弦输出电流（I）的RFID天线（10），数字功率放大器（13）包括：具有第一传输输出引脚（15）的集成电路（IC2） 第二传输输出引脚（16），以提供输出信号（17）; - 连接到第一和第二传输输出引脚（15,16）的分立元件（C2a，C2b）的自适应电路（14），以适应输出信号（17）并馈送基本正弦输出电流（1） 所述集成电路（IC2）包括：数字控制部分（19），所述数字控制部分具有多个N个波形形成触点（20），以将N位的数字波形组合输出到所述RFID天线 时钟频率是传输谐振频率的M倍; 多个N个驱动块（21），每个驱动块（21）与第一触点（22）连接到其中一个波形触点（20），并且其中的N / 2个触点块与第二触点连接到第一传输输出引脚 ），并且其中N / 2个的其中另外N / 2个与它们的第二触点连接到第二变速器输出引脚（16），所述驱动器块（21）被构建为向第一和第二变速器输出引脚（16）提供基本正弦输出电流 第二传输输出引脚（15,16）。

公开(公告)号：EP2634922A3

公开(公告)日：2016-10-26

申请号：EP13156377.7

申请日：2013-02-22

申请人： Lantiq Deutschland GmbH

发明人： Clara, Martin ,  Gruber, Daniel ,  Klatzer, Wolfgang

IPC分类号： H03M1/10 ,  H03M1/74

CPC分类号： H03M1/1061 ,  H03M1/742

摘要： Representative implementations of devices and techniques provide digital-to-analog conversion of signals while minimizing switching related errors. Digital to analog converter (DAC) cells may be arranged to include one or more operating states in addition to binary output states, and may employ a switching technique to "dump" the DAC cell between binary outputs. Further, an array of DAC cells may include a partial set of redundant DAC cells for implementation of the switching technique.

公开(公告)号：EP2449681B1

公开(公告)日：2016-08-10

申请号：EP10730397.6

申请日：2010-06-10

申请人： MediaTek Singapore Pte. Ltd.

发明人： O'DONNELL, John, Jude ,  THOMPSON, Frederick, Carnegie

IPC分类号： H03M1/74

CPC分类号： H03M1/0836 ,  H03M1/66

公开(公告)号：EP3002879A1

公开(公告)日：2016-04-06

申请号：EP15181432.4

申请日：2015-08-18

申请人： NXP B.V.

发明人： Deloge, Matthieu ,  van der Wel, Arnoud Pieter

IPC分类号： H03M1/08 ,  H03M1/66 ,  H03M1/74

CPC分类号： H03M1/661 ,  H03M1/0881 ,  H03M1/745 ,  H04B1/38

摘要： Embodiments of digital-to-analog converters (DACs), methods for operating a DAC, and transceiver circuits are described. In one embodiment, a DAC includes an input terminal configured to receive a digital signal, a converter circuit configured to convert the digital signal into an analog signal using first-order interpolation allowing low electromagnetic emissions, and an output terminal configured to output the analog signal. Other embodiments are also described.

摘要翻译： 描述了数模转换器（DAC）的实施例，用于操作DAC的方法和收发器电路。 在一个实施例中，DAC包括被配置为接收数字信号的输入端子，被配置为使用允许低电磁发射的一阶插值将数字信号转换为模拟信号的转换器电路，以及被配置为输出模拟信号的输出端子 。 还描述了其他实施例。

公开(公告)号：EP2974033A1

公开(公告)日：2016-01-20

申请号：EP14720388.9

申请日：2014-03-14

申请人： Xilinx, Inc.

发明人： LOWNEY, Donnacha ,  ERDMANN, Christophe ,  CULLEN, Edward

IPC分类号： H03M1/10 ,  H03M1/74

CPC分类号： H03M1/1009 ,  H03M1/742

摘要： An apparatus for calibration of a signal converter is disclosed. This apparatus includes a first digital-to-analog converter (“DAC”) and a calibration system coupled to an output port of the first DAC. The calibration system includes a second DAC. The calibration system is configured to provide an adjustment signal responsive to a spurious spectral performance parameter in an output of the first DAC. The spurious spectral performance parameter is sensitive to a timing error associated with the first DAC. The calibration system is coupled to provide the adjustment signal to the first DAC to correct the timing error of the first DAC.

摘要翻译： 公开了一种用于校准信号转换器的装置。 该装置包括第一数模转换器（“DAC”）和耦合到第一DAC的输出端口的校准系统。 校准系统包括第二DAC。 校准系统被配置为响应于第一DAC的输出中的寄生光谱性能参数提供调整信号。 寄生光谱性能参数对与第一个DAC相关的定时误差敏感。 校准系统被耦合以向第一DAC提供调整信号以校正第一DAC的定时误差。