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公开(公告)号：EP2011164B1
公开(公告)日：2018-08-29
申请号：EP07754938.4
申请日：2007-04-04
申请人： Cree, Inc.
CPC分类号： H01L33/502 , C09K11/7731 , C09K11/7734 , C09K11/7774 , G02B6/0023 , G02B6/0068 , G02B6/0073 , H01L33/486 , H01L33/52 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2924/01322 , H01L2933/0091 , Y02B20/181 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode is disclosed. The diode includes a package support and a semiconductor chip on the package support, with the chip including an active region that emits light in the visible portion of the spectrum. Metal contacts are in electrical communication with the chip on the package. A substantially transparent encapsulant covers the chip in the package. A phosphor in the encapsulant emits a frequency in the visible spectrum different from the frequency emitted by the chip and in response to the wavelength emitted by the chip. A display element is also disclosed that combines the light emitting diode and a planar display element. The combination includes a substantially planar display element with the light emitting diode positioned on the perimeter of the display element and with the package support directing the output of the diode substantially parallel to the plane of the display element.
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公开(公告)号：EP2140503B1
公开(公告)日：2018-10-03
申请号：EP08745097.9
申请日：2008-04-04
申请人： Cree, Inc.
CPC分类号： H01L33/42 , H01L33/0079 , H01L33/20 , H01L33/22
摘要： A light emitting diode is disclosed that includes an active structure formed of at least p-type and n-type epitaxial layers of Group III nitride on a conductive carrier substrate. A conductive bonding system joins the active structure to the conductive carrier substrate. A first transparent ohmic contact is on the active structure adjacent the conductive carrier substrate, a second transparent ohmic contact is on the active structure opposite the conductive carrier substrate, and a third ohmic contact is on the conductive carrier substrate opposite from the active structure.
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3.发明授权METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING SELF ALIGNED SEMICONDUCTOR MESAS AND CONTACT LAYERS AND RELATED DEVICES 有权形成具有自对准半导体材料和接触层以及相关器件的半导体器件的方法
公开(公告)号：EP1573871B1
公开(公告)日：2018-03-07
申请号：EP03814166.9
申请日：2003-12-18
申请人： Cree, Inc.
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure (14) on a substrate (12) wherein the semiconductor structure (14) defines a mesa (20) having a mesa surface (20A) opposite the substrate (12) and mesa sidewalls between the mesa surface and the substrate. A first passivation layer (30) can be formed on at least portions of the mesa sidewalls and on the substrate (12) adjacent the mesa sidewalls wherein at least a portion of the mesa surface (20A) is free of the first passivation layer (30) and wherein the first passivation layer (30) comprises a first material. A second passivation layer (40) can be formed on the first passivation layer (30) wherein at least a portion of the mesa surface (20A) is free of the second passivation layer (40), and wherein the second passivation layer (40) comprises a second material different than the first material. Related devices are also discussed.
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4.发明公开TRANSPARENT OHMIC CONTACTS ON LIGHT EMITTING DIODES WITH CARRIER SUBSTRATES 审中-公开透明质酸酯KONTAKTE AUF LEUCHTDIODEN MITTRÄGERSUBSTRATEN
公开(公告)号：EP2140503A1
公开(公告)日：2010-01-06
申请号：EP08745097.9
申请日：2008-04-04
申请人： CREE, INC.
IPC分类号： H01L33/00
CPC分类号： H01L33/42 , H01L33/0079 , H01L33/20 , H01L33/22
摘要： A light emitting diode is disclosed that includes an active structure formed of at least p-type and n-type epitaxial layers of Group III nitride on a conductive carrier substrate. A conductive bonding system joins the active structure to the conductive carrier substrate. A first transparent ohmic contact is on the active structure adjacent the conductive carrier substrate, a second transparent ohmic contact is on the active structure opposite the conductive carrier substrate, and a third ohmic contact is on the conductive carrier substrate opposite from the active structure.
摘要翻译： 公开了一种发光二极管，其包括在导电载体衬底上由至少p型和n型III族氮化物外延层形成的有源结构。 导电接合系统将活性结构连接到导电载体基底。 第一透明欧姆接触在与导电载体衬底相邻的有源结构上，在与导电载体衬底相对的有源结构上是第二透明欧姆接触，并且第三欧姆接触位于与有源结构相反的导电载体衬底上。
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公开(公告)号：EP3422425A1
公开(公告)日：2019-01-02
申请号：EP18188441.2
申请日：2007-04-04
申请人： Cree, Inc.
IPC分类号： H01L33/50
摘要： A light emitting diode is disclosed. The diode includes a package support and a semiconductor chip on the package support, with the chip including an active region that emits light in the visible portion of the spectrum. Metal contacts are in electrical communication with the chip on the package. A substantially transparent encapsulant covers the chip in the package. A phosphor in the encapsulant emits a frequency in the visible spectrum different from the frequency emitted by the chip and in response to the wavelength emitted by the chip. A display element is also disclosed that combines the light emitting diode and a planar display element. The combination includes a substantially planar display element with the light emitting diode positioned on the perimeter of the display element and with the package support directing the output of the diode substantially parallel to the plane of the display element.
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公开(公告)号：EP2011164A2
公开(公告)日：2009-01-07
申请号：EP07754938.4
申请日：2007-04-04
申请人： CREE, INC.
IPC分类号： H01L33/00
CPC分类号： H01L33/502 , C09K11/7731 , C09K11/7734 , C09K11/7774 , G02B6/0023 , G02B6/0068 , G02B6/0073 , H01L33/486 , H01L33/52 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2924/01322 , H01L2933/0091 , Y02B20/181 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode is disclosed. The diode includes a package support and a semiconductor chip on the package support, with the chip including an active region that emits light in the visible portion of the spectrum. Metal contacts are in electrical communication with the chip on the package. A substantially transparent encapsulant covers the chip in the package. A phosphor in the encapsulant emits a frequency in the visible spectrum different from the frequency emitted by the chip and in response to the wavelength emitted by the chip. A display element is also disclosed that combines the light emitting diode and a planar display element. The combination includes a substantially planar display element with the light emitting diode positioned on the perimeter of the display element and with the package support directing the output of the diode substantially parallel to the plane of the display element.
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7.发明公开
公开(公告)号：EP1573870A2
公开(公告)日：2005-09-14
申请号：EP03800027.9
申请日：2003-12-18
申请人： CREE, INC.
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
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公开(公告)号：EP2102920B1
公开(公告)日：2018-03-21
申请号：EP08713756.8
申请日：2008-01-15
申请人： Cree, Inc.
CPC分类号： H01L33/60 , G02B6/0073 , H01L33/486 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2924/00014
摘要： A light emitting diode lamp is disclosed that includes a resin package that defines a recess in the shape of a solid polygon or another three-dimensional solid. The recess includes a floor, two side walls along the respective longer sides of the floor, and two end walls along the respective shorter sides of the floor. The two side walls define an angle therebetween greater than 3°, and the two end walls define an angle therebetween greater than 40°. A light emitting diode chip is positioned on the rectangular floor of the package.
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9.发明授权
公开(公告)号：EP1573870B1
公开(公告)日：2007-02-07
申请号：EP03800027.9
申请日：2003-12-18
申请人： CREE, INC.
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
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10.发明公开METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING SELF ALIGNED SEMICONDUCTOR MESAS AND CONTACT LAYERS AND RELATED DEVICES 有权方法自调心SEMICONDUCTOR MESEN层和接触层和相似的元素半导体器件
公开(公告)号：EP1573871A2
公开(公告)日：2005-09-14
申请号：EP03814166.9
申请日：2003-12-18
申请人： CREE, INC.
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure (14) on a substrate (12) wherein the semiconductor structure (14) defines a mesa (20) having a mesa surface (20A) opposite the substrate (12) and mesa sidewalls between the mesa surface and the substrate. A first passivation layer (30) can be formed on at least portions of the mesa sidewalls and on the substrate (12) adjacent the mesa sidewalls wherein at least a portion of the mesa surface (20A) is free of the first passivation layer (30) and wherein the first passivation layer (30) comprises a first material. A second passivation layer (40) can be formed on the first passivation layer (30) wherein at least a portion of the mesa surface (20A) is free of the second passivation layer (40), and wherein the second passivation layer (40) comprises a second material different than the first material. Related devices are also discussed.
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