公开(公告)号：EP1032047B9

公开(公告)日：2011-02-09

申请号：EP00301097.2

申请日：2000-02-11

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Sakano, Jyunichi ,  Mori, Mutsuhiro

IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L23/528 ,  H02M7/527

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1868242A3

公开(公告)日：2009-02-18

申请号：EP07011562.1

申请日：2007-06-13

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Mori, Mutsuhiro ,  Saito, Katsuaki ,  Koike, Yoshihiko

IPC分类号： H01L25/00 ,  H01L25/07 ,  H01L25/065

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An elastic printed board (102) is provided so that stress applied by the silicon gel (101) is absorbed by the printed board (102). Further, the printed board (102) is formed to be so narrow that the stress may be escaped. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board served as current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and crack of the cover plate (105).

摘要翻译： 提供弹性印刷电路板（102），使得由硅胶（101）施加的应力被印刷电路板（102）吸收。 此外，印刷电路板（102）形成为如此狭窄，使得应力可能逸出。 另一方面，施加高电压的导线在相应的印刷电路板上图案化。 这用于防止通过作为当前通道的相同印刷电路板的表面放电。 该设计使得能够密封电源模块，防止潮湿或污染的侵入以及盖板（105）的位移，转换和裂纹。

公开(公告)号：EP2221870B1

公开(公告)日：2018-03-14

申请号：EP10002938.8

申请日：2007-06-13

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Mori, Mutsuhiro ,  Saito, Katsuaki ,  Koike, Yoshihiko

IPC分类号： H01L25/07 ,  H01L25/16 ,  H01L23/24 ,  H05K1/14

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An elastic printed board (102) is provided so that stress applied by the silicon gel (101) is absorbed by the printed board (102). Further, the printed board (102) is formed to be so narrow that the stress may be escaped. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board served as current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and crack of the cover plate (105).

公开(公告)号：EP1811572B1

公开(公告)日：2012-05-30

申请号：EP07009037.8

申请日：2000-02-11

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Sakano, Jyunichi ,  Mori, Mutsuhiro

IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L23/528 ,  H02M7/527

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1811572A2

公开(公告)日：2007-07-25

申请号：EP07009037.8

申请日：2000-02-11

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Sakano, Jyunichi ,  Mori, Mutsuhiro

IPC分类号： H01L29/739 ,  H02M7/527

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L2924/0002 ,  H01L2924/00

摘要： An area of a narrow interval between neighboring insulating gates (7) and an area of a wide interval are provided and in the area of a wide interval, a p-type well layer deeper (9) than a p-type base layer is provided. By use of this constitution, even if an area of a narrow interval between neighboring insulating gates and an area of a wide interval are provided, the withstand voltage will not be lowered.

摘要翻译： 提供了相邻绝缘栅极（7）和宽间隔区域之间的窄间隔区域，并且在宽间隔的区域中，提供比p型基极层更深（9）的p型阱层 。 通过使用这种结构，即使设置相邻绝缘栅极与宽间隔区域之间的窄间隔的区域，也不会降低耐压。

公开(公告)号：EP1868242B1

公开(公告)日：2014-10-08

申请号：EP07011562.1

申请日：2007-06-13

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Mori, Mutsuhiro ,  Saito, Katsuaki ,  Koike, Yoshihiko

IPC分类号： H01L23/24 ,  H05K1/14 ,  H01L25/16 ,  H01L25/18 ,  H01L25/07

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：EP2256813A3

公开(公告)日：2012-09-05

申请号：EP10009398.8

申请日：2006-04-11

申请人： Hitachi, Ltd.

发明人： Arai, Taiga ,  Mori, Mutsuhiro ,  Oyama, Kazuhiro ,  Kohno, Yasuhiko ,  Sakurai, Naoki

IPC分类号： H01L29/08 ,  H01L29/739

CPC分类号： H01L29/0834 ,  H01L29/7395 ,  H01L29/7397

摘要： An IGBT according to the present invention has an N-layer having a larger carrier concentration and being deeper than a substrate on the collector side and a lowly injected p-layer realizing a low switching loss on the collector side, wherein the maximum of the carrier concentration of the p-layer on the collector side is 10 to 100 times of the maximum of the carrier concentration of the n-layer adjoining the p-layer and the turn-off loss is reduced without lowering a reverse bias safety operation area (RBSOA) of the IGBT.

公开(公告)号：EP2256813A2

公开(公告)日：2010-12-01

申请号：EP10009398.8

申请日：2006-04-11

申请人： Hitachi, Ltd.

发明人： Arai, Taiga ,  Mori, Mutsuhiro ,  Oyama, Kazuhiro ,  Kohno, Yasuhiko ,  Sakurai, Naoki

IPC分类号： H01L29/08 ,  H01L29/739

CPC分类号： H01L29/0834 ,  H01L29/7395 ,  H01L29/7397

摘要： An IGBT according to the present invention has an N-layer having a larger carrier concentration and being deeper than a substrate on the collector side and a lowly injected p-layer realizing a low switching loss on the collector side, wherein the maximum of the carrier concentration of the p-layer on the collector side is 10 to 100 times of the maximum of the carrier concentration of the n-layer adjoining the p-layer and the turn-off loss is reduced without lowering a reverse bias safety operation area (RBSOA) of the IGBT.

摘要翻译： 根据本发明的IGBT具有比集电极侧的衬底更深的载流子浓度的N层和在集电极侧实现低开关损耗的低注入p层，其中载流子的最大值 集电极侧的p层的浓度为与p层相邻的n层的载流子浓度的最大值的10〜100倍，关断损失降低，而不会降低反向偏置安全操作区域（RBSOA ）。

公开(公告)号：EP2237319A2

公开(公告)日：2010-10-06

申请号：EP10007172.9

申请日：2000-02-11

申请人： Hitachi Ltd.

发明人： Oyama, Kazuhiro ,  Sakano, Jyunichi ,  Mori, Mutsuhiro

IPC分类号： H01L29/739 ,  H01L29/06 ,  H01L23/528 ,  H02M7/527

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L2924/0002 ,  H01L2924/00

摘要： An area of a narrow interval between neighboring insulating gates and an area of a wide interval are provided and in the area of a wide interval, a p-type well layer deeper than a p-type base layer is provided. By use of this constitution, even if an area of a narrow interval between neighboring insulating gates and an area of a wide interval are provided, the withstand voltage will not be lowered.

摘要翻译： 提供了相邻绝缘栅极和宽间隔区域之间的窄间隔区域，并且在宽间隔的区域中，提供了比p型基极层更深的p型阱层。 通过使用这种结构，即使设置相邻绝缘栅极与宽间隔区域之间的窄间隔的区域，也不会降低耐压。

公开(公告)号：EP1868242A2

公开(公告)日：2007-12-19

申请号：EP07011562.1

申请日：2007-06-13

申请人： Hitachi, Ltd.

发明人： Oyama, Kazuhiro ,  Mori, Mutsuhiro ,  Saito, Katsuaki ,  Koike, Yoshihiko

IPC分类号： H01L25/00

CPC分类号： H05K1/144 ,  H01L23/24 ,  H01L25/072 ,  H01L25/16 ,  H01L25/162 ,  H01L25/18 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0254 ,  H05K1/0271 ,  H05K1/147 ,  H05K3/284 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09081 ,  H05K2201/10287 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An elastic printed board (102) is provided so that stress applied by the silicon gel (101) is absorbed by the printed board (102). Further, the printed board (102) is formed to be so narrow that the stress may be escaped. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board served as current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and crack of the cover plate (105).