公开(公告)号：EP1979949A4

公开(公告)日：2010-08-25

申请号：EP07710011

申请日：2007-01-09

Applicant: IBM

Inventor： CHENG KANGGUO ,  RASSEL ROBERT M

IPC: H01L29/94 ,  H01L21/02 ,  H01L21/334 ,  H01L27/01 ,  H01L27/06

CPC classification number: H01L29/945 ,  H01L27/016 ,  H01L27/0682 ,  H01L28/20 ,  H01L29/66181

公开(公告)号：EP2160757A4

公开(公告)日：2010-08-04

申请号：EP08780748

申请日：2008-06-04

Applicant: IBM

Inventor： CHENG KANGGUO

IPC: H01L21/336 ,  H01L29/49

CPC classification number: H01L29/4991 ,  H01L21/28194 ,  H01L29/42368 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66583 ,  Y10S438/926

公开(公告)号：EP2008300A4

公开(公告)日：2012-05-23

申请号：EP07758889

申请日：2007-03-20

Applicant: IBM

Inventor： DIVAKARUNI RAMACHANDRA ,  CHENG KANGGUO

IPC: H01L21/44 ,  C01B32/50 ,  H01L21/00 ,  H01L21/84 ,  H01L27/108 ,  H01L29/78

CPC classification number: H01L29/7827 ,  H01L21/84 ,  H01L27/0207 ,  H01L27/10841 ,  H01L27/10876 ,  H01L29/66666 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure and method of forming a body contact for a semiconductor-on-insulator trench device. The method including: forming set of mandrels on a top surface of a substrate, each mandrel of the set of mandrels arranged on a different corner of a polygon and extending above the top surface of the substrate, a number of mandrels in the set of mandrels equal to a number of corners of the polygon; forming sidewall spacers on sidewalls of each mandrel of the set of mandrels, sidewalls spacers of each adjacent pair of mandrels merging with each other and forming a unbroken wall defining an opening in an interior region of the polygon, a region of the substrate exposed in the opening; etching a contact trench in the substrate in the opening; and filling the contact trench with an electrically conductive material to form the contact.

公开(公告)号：EP1812966A4

公开(公告)日：2010-07-14

申请号：EP05848854

申请日：2005-11-09

Applicant: IBM

Inventor： CHENG KANGGUO ,  RADENS CARL J

IPC: H01L21/8242

CPC classification number: H01L21/823807 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/0629 ,  H01L27/1087 ,  H01L27/10894 ,  H01L27/1203 ,  H01L27/1207

公开(公告)号：EP1977425A4

公开(公告)日：2009-04-29

申请号：EP07710032

申请日：2007-01-10

Applicant: IBM

Inventor： CHENG KANGGUO ,  DIVAKARUNI RAMACHANDRA ,  MANDELMAN JACK A ,  RADENS CARL J ,  WANG GENG

IPC: G11C11/24 ,  H01L21/8242

CPC classification number: G11C8/16 ,  G11C11/405 ,  G11C11/4097 ,  H01L27/0207 ,  H01L27/108 ,  H01L27/10861

Abstract: An integrated circuit is provided which includes a memory having multiple ports per memory cell for accessing a data bit within each of a plurality of the memory cells. Such memory includes an array of memory cells in which each memory cell includes a plurality of capacitors (102) connected together as a unitary source of capacitance. A first access transistor (104) is coupled between a first one of the plurality of capacitors and a first bitline and a second access transistor (106) is coupled between a second one of the plurality of capacitors and a second bitline. In each memory cell, a gate of the first access transistor is connected to a first wordline and a gate of the second access transistor is connected to a second wordline.