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1.发明公开
公开(公告)号：EP3391229A1
公开(公告)日：2018-10-24
申请号：EP16876323.3
申请日：2016-11-18
申请人： Intel Corporation
CPC分类号： G06F3/0619 , G06F3/0611 , G06F3/0659 , G06F3/0679 , G06F3/0685 , G06F3/0688 , G06F11/00 , G06F12/0238 , G06F12/0246 , G06F12/0866 , G06F12/0888 , G06F2212/1024 , G06F2212/1028 , G06F2212/1032 , G06F2212/7203 , G06F2212/7208 , Y02D10/13
摘要： Technologies for accessing memory devices of a memory module device includes receiving a memory read request form a host and reading, in response to the memory read request, a rank of active non-volatile memory devices of the memory module device while contemporaneously accessing a volatile memory device of the memory module device. The volatile memory device shares data lines of a data bus of the memory module device with a spare non-volatile memory device associated with the rank of active non-volatile memory devices. During write operations, each of the rank of active non-volatile memory devices and the spare non-volatile memory device associated with the rank of active non-volatile memory devices are written to facilitate proper wear leveling of the non-volatile memory devices. The spare non-volatile memory device may replace a failed non-volatile memory devices of the rank of active non-volatile memory devices. In such an event, the volatile memory device is no longer contemporaneously accessed during read operations of the rank of active non-volatile memory devices.
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公开(公告)号：EP3161639A1
公开(公告)日：2017-05-03
申请号：EP15814715.7
申请日：2015-05-28
申请人： Intel Corporation
CPC分类号： G06F11/073 , G06F11/0769 , G06F11/0787 , G09C1/00 , G11C5/04 , G11C29/52 , G11C2029/0409
摘要： Examples may include a basic input/output system (BIOS) for a computing platform communicating with a controller for a non-volatile dual in-line memory module (NVDIMM). Communication between the BIOS and the controller may include a request for the controller to scan and identify error locations in non-volatile memory at the NVDIMM. The non-volatile memory may be capable of providing persistent memory for the NVDIMM.
摘要翻译： 示例可以包括用于与用于非易失性双列直插式存储器模块（NVDIMM）的控制器通信的计算平台的基本输入/输出系统（BIOS）。 BIOS与控制器之间的通信可以包括请求控制器扫描并识别NVDIMM处的非易失性存储器中的错误位置。 非易失性存储器可能能够为NVDIMM提供持久存储器。
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公开(公告)号：EP3712774A1
公开(公告)日：2020-09-23
申请号：EP20173833.3
申请日：2011-09-30
申请人： INTEL Corporation
发明人： RAMANUJAN, Raj K. , AGARWAL, Rajat , CHENG, Kai , POLEPEDDI, Taarinya , RAAD, Camille C. , ZIMMERMAN, David J. , SWAMINATHAN, Muthukumar P. , ZIAKAS, Dimitrios , KUMAR, Mohan J. , COURY, Bassam N. , HINTON, Glenn J.
摘要： A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one embodiment, PCMS memory devices are used as one tier in the hierarchy, sometimes referred to as "far memory." Higher performance memory devices such as DRAM placed in front of the far memory and are used to mask some of the performance limitations of the far memory. These higher performance memory devices are referred to as "near memory."
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