公开(公告)号：EP4266175B1

公开(公告)日：2024-09-04

申请号：EP22169515.8

申请日：2022-04-22

IPC分类号： G06F11/10 ,  G06F11/07 ,  G06F11/14 ,  G06F11/16

CPC分类号： G06F11/1048 ,  G06F11/1008 ,  G06F11/073 ,  G06F11/1479 ,  G06F11/1608 ,  G06F11/1629

公开(公告)号：EP3401792A1

公开(公告)日：2018-11-14

申请号：EP17746813.9

申请日：2017-01-20

申请人： Huawei Technologies Co., Ltd.

发明人： GAO, Meng ,  LIU, Kunpeng

IPC分类号： G06F12/02

CPC分类号： G06F12/1009 ,  G06F9/45558 ,  G06F11/073 ,  G06F12/02 ,  G06F12/0238 ,  G06F12/0246 ,  G06F2009/45583 ,  G06F2212/151 ,  G06F2212/205 ,  G06F2212/657 ,  G06F2212/7201

摘要： This application discloses a memory address assignment method for a virtual machine and an apparatus, the virtual machine runs on a host machine, the host machine includes a physical memory area with power failure protection, the virtual machine includes a virtual memory area with power failure protection, and the method includes: determining, by the host machine, that a virtual memory address in which a page fault occurs in the virtual machine belongs to the virtual memory area with power failure protection; and assigning, by the host machine, a physical memory address of the host machine from the physical memory area with power failure protection to the virtual memory address. The method can effectively improve assignment efficiency.

公开(公告)号：EP3259671B1

公开(公告)日：2018-10-31

申请号：EP16703901.5

申请日：2016-01-29

申请人： Qualcomm Incorporated

发明人： KOOB, Christopher Edward ,  PLONDKE, Erich James ,  TU, Jiajin

IPC分类号： G06F12/10 ,  G06F1/32 ,  G06F9/44 ,  G06F12/08 ,  G06F12/1027 ,  G06F11/07

CPC分类号： G06F12/1027 ,  G06F1/32 ,  G06F11/073 ,  G06F11/079 ,  G06F12/08 ,  G06F2212/1028 ,  G06F2212/1032 ,  G06F2212/502 ,  G06F2212/684 ,  Y02D10/13

摘要： A translation lookaside buffer (TLB) stores translation entries. The translation entries include a virtual address, a physical address and a memory local/not-local flag. When a processor is in a low power/local memory mode a virtual address is received. A matching translation entry has a local/not-local flag. Upon the local/not-local flag indicating the physical address of the matching translation entry being outside the local memory, an out-of-access-range memory access exception is generated.

公开(公告)号：EP2633408B1

公开(公告)日：2018-08-22

申请号：EP11837198.8

申请日：2011-10-28

申请人： Data Device Corporation

发明人： HILLMAN, Robert ,  WILLIAMSON, Gale

IPC分类号： G06F11/07 ,  G06F11/16 ,  G06F11/18

CPC分类号： G06F11/073 ,  G06F11/0724 ,  G06F11/0763 ,  G06F11/1658 ,  G06F11/184 ,  G06F2201/83

摘要： This disclosure provides apparatus, methods and systems for error correction in multi processor systems. Some implementations include a plurality of computing modules, each computing module including a processor. Each processor may include processing state. In some other implementations, each computing module may also include a memory. Upon receiving a signal to perform a partial re-synchronization, a hash of each processor's state data may be performed. In some embodiments, a hash of at least a portion of each computing module's memory data may also be performed. The hashes for each processor are then compared to determine majority hashes and possible minority hashes. Upon identifying a minority hash, the computing module that produced the minority hash may receive new processing state data from one of the computing modules that produced a majority hash.

公开(公告)号：EP3291239A1

公开(公告)日：2018-03-07

申请号：EP17187447.2

申请日：2017-08-23

申请人： Renesas Electronics Corporation

发明人： Saito, Tomoya ,  Fujito, Masamichi ,  Ando, Koichi ,  Hashimoto, Takashi

IPC分类号： G11C16/34

CPC分类号： G06F11/0727 ,  G06F11/073 ,  G06F11/0793 ,  G06F2212/72 ,  G11C16/28 ,  G11C16/3431 ,  G11C29/50004

摘要： The present invention aims at providing a flash memory that can perform a refresh operation at an appropriate time before a read error occurs. The controller performs the first read operation in which the memory cell as the read target is made to draw out the potential of one of the bit lines, the bit line potential controller is made to draw out the potential of the other of the bit lines at the first speed, and concurrently, the sense amplifier is made to read data; the second read operation in which the memory cell as the read target is made to draw out the potential of one of the bit lines, the bit line potential controller is made to draw out the potential of the other of the bit lines at the second speed faster than the first speed, and concurrently, the sense amplifier is made to read data; and the refresh operation in which, when the data read by the first read operation and the data read by the second read operation are determined to be different, the data stored in the memory cell as the read target is rewritten.

摘要翻译： 本发明旨在提供一种闪存，其能够在发生读取错误之前的适当时间执行刷新操作。 控制器执行第一读取操作，在该第一读取操作中，使作为读取目标的存储器单元引出一个位线的电位，使位线电势控制器将位线中的另一个的电位引出到 第一速度，同时使读出放大器读取数据; 执行第二读取操作，其中使作为读取目标的存储器单元取出一个位线的电位，使位线电位控制器以第二速度取出另一位线的电位 比第一速度快，同时使读出放大器读取数据; 以及刷新操作，其中当由第一读取操作读取的数据和由第二读取操作读取的数据被确定为不同时，存储在作为读取目标的存储器单元中的数据被重写。

公开(公告)号：EP3289464A1

公开(公告)日：2018-03-07

申请号：EP15890980.4

申请日：2015-04-30

申请人： AppDynamics LLC

发明人： MELIKYAN, Dmitri ,  ROTH, David

IPC分类号： G06F12/02 ,  G06F15/16

CPC分类号： G06F3/067 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/366 ,  H04L41/0233

摘要： A system detects memory leaks in Node.JS applications. The memory leaks are associated with lines of code rather than particular objects. Lines of code associated with a memory leak is identified by object allocation tracking. Object allocation for lines of code is tracked. A heap snapshot may be captured at the same time at which the object allocation occurs. The results of the object allocation are processed, including removal of objects cleaned up by garbage collection. Objects remaining in the object allocation results are then searched for the end heap snapshot. For objects found in the heap snapshot, the corresponding lines of code that generate the objects are reported to administrators the application.

公开(公告)号：EP3132449A4

公开(公告)日：2017-12-20

申请号：EP14889730

申请日：2014-04-16

申请人： INTEL CORP

发明人： AGRAWAL ANIL ,  MUTHIYALU SATISH ,  CHEN YINGWEN ,  GANESAN MEERA

IPC分类号： G11C29/00 ,  G06F11/10 ,  G11C29/04 ,  G11C29/52

CPC分类号： G06F11/0793 ,  G06F3/0614 ,  G06F3/0652 ,  G06F3/0673 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/106 ,  G11C29/52 ,  G11C2029/0409

摘要： Techniques and mechanisms for providing error detection and correction for a platform comprising a memory including one or more spare memory segments. In an embodiment, a memory controller performs first scrubbing operations including detection for errors in a plurality of currently active memory segments. Additional patrol scrubbing is performed for one or more memory segments while the memory segments are each available for activation as a replacement memory segment. In another embodiment, a first handler process (but not a second handler process) is signaled if an uncorrectable error event is detected based on the active segment scrubbing, whereas the second handler process (but not the first handler process) is signaled if an uncorrectable error event is detected based on the spare segment scrubbing. Of the first handler process and the second handler process, only signaling of the first handler process results in a crash event of the platform.

公开(公告)号：EP3101550A4

公开(公告)日：2017-11-15

申请号：EP15743106

申请日：2015-01-22

申请人： KYOCERA DOCUMENT SOLUTIONS INC

发明人： SUZUKI MASAHIRO

IPC分类号： G06F12/16

CPC分类号： H04N1/32443 ,  G06F11/073 ,  G06F11/0733 ,  G06F11/0751 ,  G06F12/16 ,  H04N1/2166 ,  H04N2201/0094

摘要： Image forming apparatus 1 that shortens warm-up time is provided. Accordingly, image forming apparatus 1 is an asymmetrical multiprocessing configuration provided with auxiliary memory part 21 shared between main control part 10 and sub control part 11. Use area 300 is an area accessed by main control part 10. Use area 301 is an area accessed by sub control part 11. Use area specifying part 100 specifies for use area 300 and use area specifying part 101 specifies for use area 301, respectively, by use area specifying table 210. Defective area table making part 110 makes defective area table 200 by searching whether or not a defective area only for use area 300 and set as a defective area for the other area. Defective area table making part 111 makes defective area table 201 by searching use area 301, similarly, and set as the defective area for the other area.

公开(公告)号：EP2586031A4

公开(公告)日：2017-08-23

申请号：EP11807237

申请日：2011-06-20

申请人： INTEL CORP

发明人： CHAUDHURI SANTANU ,  SALMON JOSEPH H ,  BAINS KULJIT S

IPC分类号： G06F13/16 ,  G06F11/07 ,  G11C29/42

CPC分类号： G06F11/0793 ,  G06F11/073 ,  G06F13/1689 ,  G11C2207/2254

摘要： Described herein is a method and an apparatus for training a memory signal via an error signal of a memory. The method comprises transmitting from a memory controller a command-address (C/A) signal to a memory module; determining by the memory controller an error in the memory module via an error signal from an error pin of the memory module, the error associated with the C/A signal transmitted to the memory module; and modifying by the memory controller the C/A signal in response to determining an error in the memory module, wherein the error pin is a parity error pin of the memory module, and wherein the memory module comprises a Double Data Rate 4 (DDR4) interface.

摘要翻译： 这里描述的是用于经由存储器的错误信号来训练存储器信号的方法和设备。 该方法包括从存储器控制器传输命令地址（C / A）信号到存储器模块; 由存储器控制器经由来自存储器模块的错误引脚的错误信号来确定存储器模块中的错误，所述错误信号与传送至存储器模块的C / A信号相关联; 以及响应于确定所述存储器模块中的错误而由所述存储器控制器修改所述C / A信号，其中所述错误引脚是所述存储器模块的奇偶错误引脚，并且其中所述存储器模块包括双倍数据速率4（DDR4） 接口。

公开(公告)号：EP2915045A4

公开(公告)日：2017-06-14

申请号：EP12887804

申请日：2012-11-02

申请人： HEWLETT PACKARD ENTPR DEV LP

发明人： LI SHENG ,  JOUPPI NORMAN PAUL ,  YOON DOE HYUN

IPC分类号： G11C29/02 ,  G06F11/07 ,  G06F11/10 ,  G06F12/0875 ,  G11C7/20 ,  G11C29/42 ,  G11C29/52

CPC分类号： G06F11/0787 ,  G06F11/073 ,  G06F11/1048 ,  G06F12/0875 ,  G06F2212/45 ,  G11C7/20 ,  G11C29/028 ,  G11C29/42 ,  G11C29/52 ,  G11C2029/0411

摘要： Example methods, systems, and apparatus to provide selective memory error protection and memory access granularity are disclosed herein. An example system includes a memory controller to determine a selected memory mode based on a request. The memory mode indicates that a memory page is to store a corresponding type of error protection information and is to store data for retrieval using a corresponding access granularity. The memory controller is to store the data and the error protection information in the memory page for retrieval using the error protection information and the access granularity.

摘要翻译： 本文公开了用于提供选择性存储器错误保护和存储器访问粒度的示例方法，系统和装置。 示例系统包括存储器控制器以基于请求确定选择的存储器模式。 存储器模式指示存储器页面将存储相应类型的错误保护信息，并且存储用于使用相应访问粒度进行检索的数据。 存储器控制器使用错误保护信息和访问粒度将数据和错误保护信息存储在存储器页面中用于检索。