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    Semiconductor heterostructure adapted for low temperature operation
    2.
    发明公开
    Semiconductor heterostructure adapted for low temperature operation 失效
    适用于低温操作的半导体结构

    公开(公告)号：EP0250886A3

    公开(公告)日：1990-01-17

    申请号：EP87107808.5

    申请日：1987-05-29

    申请人： International Business Machines Corporation

    发明人： Jackson, Thomas Nelson ,  Kleinsasser, Alan Willis ,  Woodall, Jerry MacPherson

    IPC分类号： H01L29/205 ,  H01L29/26 ,  H01L29/80 ,  H01L39/12 ,  H01L39/22

    CPC分类号： H01L29/66992 ,  H01L29/205 ,  H01L39/228

    摘要： A heterostructure comprising a surface semiconductor layer (3) having a small band gap and being adaptable to planar processing supported on a high resistance accommodation layer (2) effectively eliminating possible low impedance parallel current paths is described. The accommodation layer has a larger band gap than the layer (3) and is of intrinsic conductivity type. The small band gap layer has its Fermi level pinned in or near the conduction band edge at surfaces and grain boundaries thereby providing barrierless current flow and eliminating the usually inherent barries formed with metal contacts. Furthermore neither the semi insulating substrate (1), the accommodations layer (2) or the small band gap layer (3) need to be single crystalline lattice matched or epitaxial specific examples of the invention comprise: 1. a superconductor normal super­conductor device of n-InAs-100 nanometers thick with niobium superconductor electrodes spaced 250 nanometers apart and a 100 nanometer gate in the space with the n-InAs being supported by an undoped GaAs layer on a semi-insulating GaAs substrate. 2. a heterojunction field effect transistor device having a GaAlAs gate over a channel 100 nanometers thick on an undoped GaAs layer on a semi-insulating GaAs substrate.

    Thermally stable low resistance contact
    3.
    发明公开
    Thermally stable low resistance contact 失效
    ThermischbeständigerKontakt mit geringem Widerstand。

    公开(公告)号：EP0231738A2

    公开(公告)日：1987-08-12

    申请号：EP87100006.3

    申请日：1987-01-02

    申请人： International Business Machines Corporation

    发明人： Jackson, Thomas Nelson ,  Murakami, Masanori ,  Price, William Henry ,  Tiwari, Sandip ,  Woodall, Jerry MacPherson ,  Wright, Stephen Lorenz

    IPC分类号： H01L21/225 ,  H01L21/285 ,  H01L29/40 ,  H01L29/46

    CPC分类号： H01L29/452

    摘要： In a semiconductor device, a contact with low resistance to a III-V compound semiconductor substrate was fabricated using refractory materials (26, 28) and small amounts of indium (30) as the contact material. The contact material was formed by depositing Mo, Ge and W with small amounts of In onto doped GaAs wafers (24). The contact resistance less than 1.0 ohm millimeter was obtained after annealing at 800°C and the resistance did not increase after subsequent prolonged annealing at 400°C.

    摘要翻译： 在半导体器件中，使用耐火材料（26,28）和少量作为接触材料的铟（30）制造具有对III-V化合物半导体衬底的低电阻的接触。 通过将Mo，Ge和W与少量的In沉积到掺杂的GaAs晶片（24）上形成接触材料。 在800℃退火后获得的接触电阻小于1.0欧姆毫米，并且在400℃下经过长时间的退火后电阻没有增加。

    Ion implantation process for compound semiconductor
    4.
    发明公开
    Ion implantation process for compound semiconductor 失效
    ImplantationsverfahrenfürVerbindungshalbleiter。

    公开(公告)号：EP0111085A2

    公开(公告)日：1984-06-20

    申请号：EP83109941.1

    申请日：1983-10-05

    申请人： International Business Machines Corporation

    发明人： Hodgson, Rodney Trevor ,  Jackson, Thomas Nelson ,  Rupprecht, Hans Stephan ,  Woodall, Jerry MacPherson

    IPC分类号： H01L21/265 ,  H01L21/324

    CPC分类号： H01L21/3245 ,  H01L21/26546 ,  H01L21/314

    摘要： Implanted impurity ions are activated in a compound semiconductor crystal wafer (1, 3), such as GaAs over a broad integrated circuit device area (4) by providing a uniform solid layer (5) (eg 10 A to 500 A thick) of the most volatile element of the compound over the surface (2) of the device area (4) and annealing the crystal wafer at a temperature of 800°C to 900°C for a period of 1 to 20 seconds.
    The layer (5) of the most volatile element may either be formed on a backing substrate (6) or formed as a coating on the surface (2) of the crystal wafer (1, 3).

    摘要翻译： 通过提供均匀的固体层（5）（例如，厚度为500至500的厚度），在宽集成电路器件区域（4）上的化合物半导体晶体晶片（1,3），例如GaAs中激活注入的杂质离子 化合物在装置区域（4）的表面（2）上的最易挥发的元素，并且在800℃至900℃的温度下将晶体晶片退火1至20秒。 最易挥发的元件的层（5）可以形成在背衬基板（6）上，或者形成为晶体晶片（1,3）的表面（2）上的涂层。

    A semiconductor device
    5.
    发明公开
    A semiconductor device 失效
    半导体器件

    公开(公告)号：EP0097767A2

    公开(公告)日：1984-01-11

    申请号：EP83102549.9

    申请日：1983-03-15

    申请人： International Business Machines Corporation

    发明人： Dumke, William Paul ,  Woodall, Jerry MacPherson

    IPC分类号： H01L31/10 ,  H01L29/72

    CPC分类号： H01L31/1844 ,  H01L29/7371 ,  H01L31/1105 ,  Y02E10/544

    摘要： A semiconductor processor for signals such as are conveyed by fibre optics wherein the processor structure accommodates lattice mismatch and minimizes the effect of misfit dislocations. The structure permits using materials having favorable absorption properties at the 1 micrometer wavelength of optical signals. A binary semiconductor is employed with graded regions produced by adding a different third ingredient in two places so that a wide band optically transparent emitter with a graded base and graded collector are provided. The ingredients impart a strong absorption in the optical signal wavelength together with superior semiconductor carrier transit time. A structure for a silicon and germanium oxide based optical signal fibre uses a GaAlAs emitter, a base that is graded to Ga 25 In 75 As at the collector and then back to GaAs at the substrate.

    摘要翻译： 用于诸如由光纤传送的信号的半导体处理器，其中处理器结构适应晶格失配并最小化失配位错的效应。 该结构允许使用在光学信号的1微米波长处具有良好吸收特性的材料。 采用二元半导体，通过在两个位置添加不同的第三成分而产生渐变区域，从而提供具有渐变基底和渐变收集器的宽带光学透明发射体。 这些成分赋予光信号波长强大的吸收以及优异的半导体载流子传播时间。 基于硅和氧化锗的光学信号光纤的结构使用GaAlAs发射极，基极在集电极处分级为Ga25In75As，然后在基板处返回到GaAs。

    Method of logically combining optical signals
    10.
    发明公开
    Method of logically combining optical signals 失效
    Verfahren zur logischen Kombination optischer Signale。

    公开(公告)号：EP0113074A2

    公开(公告)日：1984-07-11

    申请号：EP83112244.5

    申请日：1983-12-06

    申请人： International Business Machines Corporation

    发明人： Chappell, Terry Ivan ,  Woodall, Jerry MacPherson

    IPC分类号： H01L27/14 ,  H01L31/10 ,  H03K19/14

    CPC分类号： H01L27/14643 ,  A61M2025/1059 ,  H01L31/101 ,  H03K19/14

    摘要： Optical signals of individual wavelengths are logically combined by directing the signals at an incident surface of an integrated series of photodiodes each comprising an undoped light-absorbing semiconductor region which absorbs a high proportion of a respective one of the individual wavelengths and a low proportion of the other individual wavelengths.
    Each of the integrated series of photodiodes consists of an undoped light-absorbing semiconductor region contiguous with one component region of a pair of doped semiconductor regions forming a quantum mechanical tunnelling pn junction, the combined thickness of the pair of doped semiconductor regions being of the order of the mean free path length of a charge carrier therein. The undoped light-absorbing region of a succeeding diode in the series is contiguous with the other component region of the pair of doped semiconductor regions of the preceding diode in the series.

    摘要翻译： 各个波长的光学信号通过将信号引导到集成的一系列光电二极管的入射表面来逻辑地组合，每个光电二极管包括吸收各个波长的相应一个的高比例的未掺杂的光吸收半导体区域，并且低比例的 其他单个波长。 集成的一系列光电二极管的每一个由与形成量子力学隧道pn结的一对掺杂半导体区域中的一个分量区域邻接的未掺杂的光吸收半导体区域组成，该掺杂半导体对的组合厚度 区域是其中电荷载体的自由路径长度的顺序。 该串联的后续二极管的未掺杂的光吸收区域与该系列中的前一个二极管的一对掺杂半导体区域的另一个分量区域相邻。