公开(公告)号：EP2634796B1

公开(公告)日：2020-04-08

申请号：EP12189403.4

申请日：2012-10-22

申请人： J-Devices Corporation

发明人： Sawachi, Shigenori ,  Yamagata, Osamu ,  Inoue, Hiroshi ,  Itakura, Satoru ,  Chikai, Tomoshige ,  Hori, Masahiko ,  Katsumata, Akio

IPC分类号： H01L23/538 ,  H01L21/98

公开(公告)号：EP2551904A1

公开(公告)日：2013-01-30

申请号：EP12177861.7

申请日：2012-07-25

申请人： J-Devices Corporation

发明人： Yamagata, Osamu ,  Katsumata, Akio ,  Inoue, Hiroshi ,  Sawachi, Shigenori ,  Itakura, Satoru ,  Yamaji, Yasuhiro

IPC分类号： H01L25/10

CPC分类号： H01L24/97 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/29099 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/0951 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1579 ,  H01L2924/15798 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device, comprising: an organic substrate 1; through vias 4 which penetrate the organic substrate 1 in its thickness direction; external electrodes 5b and internal electrodes 5a provided to the front and back faces of the organic substrate 1 and electrically connected to the through vias 4; a semiconductor element mounted on one main surface of the organic substrate 1 via a bonding layer 3, with an element circuit surface thereof facing upward; an insulating material layer 6 for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer 7 provided in the insulating material layer, with a part of this metal thin film wiring layer being exposed on an external surface; metal vias 10 provided in the insulating material layer and electrically connected to the metal thin film wiring layer; and external electrodes 9 formed on the metal thin film wiring layer 7, wherein the metal thin film wiring layer 7 is structured such that the electrodes disposed on the element circuit surface of the semiconductor element 2, the internal electrodes 5a, the metal vias 10, and the external electrodes 9 formed on the metal thin film wiring layer are electrically connected.

摘要翻译： 一种半导体装置，包括：有机衬底1; 通过该穿透在其厚度方向上的有机基板1的通孔4; 外部电极5b和提供到有机衬底的正面和背面内部电极5a 1和电连接到通孔4; 半导体元件通过粘接层3安装在有机衬底1的一个主表面上，在元件电路表面朝上; 绝缘材料层6，用于将半导体元件和其周边密封的; 在绝缘材料层中，与外表面被暴露在该金属薄膜布线层的一部分的金属薄膜布线层7; 提供在绝缘材料层10和电连接到所述金属薄膜布线层金属通路; 和外部电极9形成的金属薄膜布线层7上，worin金属薄膜布线层7的结构搜索，设置在半导体元件2的元件电路表面上DASS模电极，所述内部电极5a，金属过孔10， 和形成在所述金属薄膜布线层的外部电极9电连接。

公开(公告)号：EP2634796A3

公开(公告)日：2015-03-25

申请号：EP12189403.4

申请日：2012-10-22

申请人： J-Devices Corporation

发明人： Sawachi, Shigenori ,  Yamagata, Osamu ,  Inoue, Hiroshi ,  Itakura, Satoru ,  Chikai, Tomoshige ,  Hori, Masahiko ,  Katsumata, Akio

IPC分类号： H01L23/538 ,  H01L21/98

摘要： A semiconductor device, comprising: a semiconductor element; a support substrate (1); an insulating material layer (4) for sealing the semiconductor element (2a, 2b) and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer (4), with a part thereof being exposed on an external surface; and metal vias (9) provided in the insulating material layer (4) and electrically connected to the metal thin film wiring layer, wherein the semiconductor element (2a, 2b) is provided in a plurality, and the respective semiconductor elements (2a, 2b) are stacked via an insulating material (4) such that a circuit surface of each semiconductor element (2a, 2b) faces the metal thin film wiring layer, and electrode pads of each semiconductor element (2a) are exposed without being hidden by the semiconductor element (2b) stacked thereabove, and electrically connected to the metal thin film wiring layer. The semiconductor device can be manufactured in a smaller and thinner size and the number of manufacturing steps can be reduced by causing a plurality of semiconductor chips to be a vertically-stacked structure.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板（1）; 一个用于密封半导体元件（2a，2b）及其周边的绝缘材料层（4） 设置在绝缘材料层（4）中的金属薄膜布线层，其一部分暴露在外表面上; 和设置在所述绝缘材料层（4）中并与所述金属薄膜布线层电连接的金属过孔（9），其中所述半导体元件（2a，2b）设置为多个，并且各个半导体元件（2a，2b ）通过绝缘材料（4）堆叠，使得每个半导体元件（2a，2b）的电路表面面对金属薄膜布线层，并且每个半导体元件（2a）的电极焊盘被暴露而不被半导体隐藏 元件（2b）堆叠在其上面，并且电连接到金属薄膜布线层。 通过使多个半导体芯片成为垂直层叠结构，能够使半导体装置小型化，薄型化，并且能够减少制造工序。

公开(公告)号：EP2634796A2

公开(公告)日：2013-09-04

申请号：EP12189403.4

申请日：2012-10-22

申请人： J-Devices Corporation

发明人： Sawachi, Shigenori ,  Yamagata, Osamu ,  Inoue, Hiroshi ,  Itakura, Satoru ,  Chikai, Tomoshige ,  Hori, Masahiko ,  Katsumata, Akio

IPC分类号： H01L21/98 ,  H01L25/065

摘要： A semiconductor device, comprising: a semiconductor element; a support substrate (1); an insulating material layer (4) for sealing the semiconductor element (2a, 2b) and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer (4), with a part thereof being exposed on an external surface; and metal vias (9) provided in the insulating material layer (4) and electrically connected to the metal thin film wiring layer, wherein the semiconductor element (2a, 2b) is provided in a plurality, and the respective semiconductor elements (2a, 2b) are stacked via an insulating material (4) such that a circuit surface of each semiconductor element (2a, 2b) faces the metal thin film wiring layer, and electrode pads of each semiconductor element (2a) are exposed without being hidden by the semiconductor element (2b) stacked thereabove, and electrically connected to the metal thin film wiring layer. The semiconductor device can be manufactured in a smaller and thinner size and the number of manufacturing steps can be reduced by causing a plurality of semiconductor chips to be a vertically-stacked structure.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板（1）; 用于密封半导体元件（2a，2b）的绝缘材料层（4）及其周边; 设置在绝缘材料层（4）中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在所述绝缘材料层（4）中并电连接到所述金属薄膜布线层的金属通孔（9），其中所述半导体元件（2a，2b）设置为多个，并且所述半导体元件（2a，2b） ）通过绝缘材料（4）堆叠，使得每个半导体元件（2a，2b）的电路表面面向金属薄膜布线层，并且每个半导体元件（2a）的电极焊盘暴露而不被半导体隐藏 元件（2b），并且与金属薄膜布线层电连接。 半导体器件可以制造成更小和更薄的尺寸，并且可以通过使多个半导体芯片成为垂直堆叠的结构来减少制造步骤的数量。

公开(公告)号：EP2903021A1

公开(公告)日：2015-08-05

申请号：EP14153041.0

申请日：2014-01-29

申请人： J-Devices Corporation

发明人： Inoue, Hiroshi ,  Katsumata, Akio ,  Sawachi, Shigenori ,  Yamagata, Osamu

IPC分类号： H01L23/00 ,  H01L25/10

CPC分类号： H01L24/19 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2924/00

摘要： A semiconductor device (100), having an insulating substrate (102); a semiconductor element (101) which is mounted on one main surface of the insulating substrate via adhesive (103), with an element circuit surface of the semiconductor element facing upwards; a first insulating material layer (104a) which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto; a first metal thin film wire layer (105) which is provided on the first insulating material layer (104a) and a portion of which is exposed to an external surface; a first insulating material layer (104b) which is provided on the first metal thin film wire layer (105); a second insulating material layer (107) which is provided on a main surface of the insulating substrate (102) where the semiconductor element is not mounted; a second metal thin film wire layer (106) which is provided inside the second insulating material layer and a portion of which is exposed to an external surface; a via (108) which passes through the insulating substrate and which electrically connects the first metal thin film wire layer (105) in the first insulating material layer (104a) and the second metal thin film wire layer (106); and an external electrode (109) which is formed on the first metal thin film wire layer (105), the semiconductor device having a structure in which the second metal thin film wire layer, an electrode arranged on the element circuit surface of the semiconductor element, the first metal thin film wire layer, the via and the external electrode formed on the first metal thin film wire layer are electrically connected.

摘要翻译： 一种半导体装置（100），具有对绝缘衬底（102）; 其经由粘合剂（103）安装在所述绝缘基片的一个主表面，与面向上的半导体元件的元件电路表面上的半导体元件（101）的所有; 密封该半导体元件的元件电路表面和外周在其上的绝缘基板的第一绝缘材料层（104A）; 其上设置有第一绝缘材料层（104A）和所有的暴露于外部表面上的一部分上的第1金属薄膜层金属线（105）的所有; 其设置在所述第一金属薄膜层金属线（105）的第一绝缘材料层（104B）; 其设置在其中的半导体元件没有被安装在绝缘基板（102）的主表面上的第二绝缘材料层（107）的所有; 该第二绝缘材料层和所有的暴露于外部表面上的部分的内侧设置的第二金属薄膜层金属线（106）的所有; 通孔（108），通过绝缘基板和通过其电连接在所述第一绝缘材料层中的第一金属薄膜层金属线（105）（104A）和所述第二金属薄膜层金属线（106）; 和所有其在第1金属薄膜布线层（105）上形成了外部电极（109），具有在上电极上的第2金属薄膜布线层的半导体元件的元件电路表面上排列的结构的半导体器件 中，第一金属薄膜层金属线，通孔和形成在所述第1金属薄膜层导线与外部电极电连接。