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公开(公告)号：EP3546964A1
公开(公告)日：2019-10-02
申请号：EP18165304.9
申请日：2018-03-30
发明人： EWANCHUK, Jeffrey
摘要： The present invention concerns a method and a device for monitoring a multi-die power module (15) comprising dies that are in a half-bridge switch configuration.
The invention:
- sets the dies in a non conductive state,
- selects one die which is blocking a voltage,
- injects a current in a gate of the selected die in order to charge an input parasitic capacitance of the selected die,
- monitors a voltage that is representative of a voltage on the gate of the selected die,
- memorizes the value of the monitored voltage when the value of the monitored voltage is stabilized.-
公开(公告)号：EP3208921B1
公开(公告)日：2019-04-17
申请号：EP16155848.1
申请日：2016-02-16
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3.发明公开
公开(公告)号：EP3705900A1
公开(公告)日：2020-09-09
申请号：EP19161336.3
申请日：2019-03-07
摘要： The present invention concerns a method and device for monitoring the connections of semiconductors of a power module, the semiconductors being connected in parallel and providing voltage and current to a load according to a pulse width modulation. The invention:
- determines if the duration of the conducting state of the semiconductors in a first cycle of the pulse width modulation is upper than a predetermined duration,
- measures, during the conducting state of the semiconductors at a second cycle, the voltage provided to the load,
- sequentially disables the conduction of each semiconductor during a part of the duration of the conducting state of the semiconductors in a third cycle and measures the voltage provided to the load,
- determines the differences between the voltage measured during the second cycle and each voltage measured during the third cycle,
- orders the differences according to their value,
- checks if the determined order is identical to an order stored in a memory of the device and determines that one connection of one semiconductor is deteriorated if the order is changed.-
公开(公告)号：EP3336499A1
公开(公告)日：2018-06-20
申请号：EP16204567.8
申请日：2016-12-16
摘要： The present invention concerns a method for controlling the temperature of a multi-die power module, the method comprising the steps of:
- determining a first weighted arithmetic mean of junction temperatures of the dies of the multi-die power module and memorizing the weighted arithmetic mean,
- determining successively another weighted arithmetic mean of junction temperatures of the dies,
- checking if the difference between the other weighted arithmetic mean and the memorized weighted arithmetic mean is lower than a first predetermined value,
- enabling a modification of the duty cycle of an input signal to apply to at least one selected die of the multi-die power module if the difference between the other weighted arithmetic mean and the memorized weighted arithmetic mean is lower than a first predetermined value,
- disabling a modification of the duty cycle of the input signal to apply to the at least one die of the multi-die power module if the difference between the other weighted arithmetic mean and the memorized weighted arithmetic mean is not lower than the first predetermined value.-
5.发明公开METHOD FOR DETERMINING THE JUNCTION TEMPERATURE OF AT LEAST ONE DIE OF A SEMICONDUCTOR POWER MODULE 审中-公开用于确定半导体功率模块的至少一个模的结温的方法
公开(公告)号：EP3208586A1
公开(公告)日：2017-08-23
申请号：EP16156238.4
申请日：2016-02-18
CPC分类号： G01K7/16 , G01K7/015 , G01K13/00 , G01K2217/00 , H03K17/122 , H03K17/145
摘要： The present invention concerns a method for determining the junction temperature of at least one die of a semiconductor power module, the semiconductor power module being composed of plural dies connected in parallel and switching between conducting and non conductor states according to pattern cycles. The method comprises the steps of:
- disabling the conducting of the at least one die during at least a fraction of one switching cycle,
- applying a current limited voltage to the gate of the at least one die during a period of time of the cycle wherein the at least one die is not conducting, the resulting voltage excursion having a value that does not enable the die to be conducting,
- measuring the voltage at the gate of the die,
- deriving from the measured voltage a temperature variation of the junction of the at least one die or the temperature of the junction of the die.摘要翻译： 用于确定半导体功率模块的至少一个管芯的结温的方法技术领域本发明涉及一种用于确定半导体功率模块的至少一个管芯的结温的方法，所述半导体功率模块由并联连接的多个管芯组成， 该方法包括以下步骤： - 在至少一个开关周期的一部分期间禁用至少一个管芯的导通， - 在该周期的时间段期间向至少一个管芯的栅极施加电流限制电压 其中所述至少一个管芯不导电，所得到的电压偏移具有不能使管芯导通的值， - 测量管芯的栅极处的电压， - 从所测量的电压导出所述结的温度变化 至少一个管芯的结点或管芯结点的温度。
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公开(公告)号：EP3489994B1
公开(公告)日：2020-08-26
申请号：EP17204197.2
申请日：2017-11-28
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公开(公告)号：EP3584833A1
公开(公告)日：2019-12-25
申请号：EP18305763.7
申请日：2018-06-19
IPC分类号： H01L23/498 , H01L21/48 , H01L23/538
摘要： The invention relates to an electrical power assembly (1), comprising:
- a power die (10), having at least two electrical contacts (11),
- an electrically insulating core (20), wherein the power die is embedded in the electrically insulating core, and
- two layers (30) of electrically conductive material on opposite main surfaces of the electrically insulating core,
characterized in that the electrical power assembly comprises at least one open cavity (40) extending from an electrical contact (11) of the power die, through the electrically insulating core and the layer (30) of electrically conductive material located on the same side of the power die than the electrical contact, such that the open cavity has a bottom (41) formed by an area of the electrical contact of the power die.-
公开(公告)号：EP3208586B1
公开(公告)日：2019-08-28
申请号：EP16156238.4
申请日：2016-02-18
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公开(公告)号：EP3489997A1
公开(公告)日：2019-05-29
申请号：EP17204198.0
申请日：2017-11-28
摘要： The present invention concerns a system for allowing the restoration of a first interconnection of a die of a power module connecting the die to an electric circuit. The system comprises:
- at least one other interconnection of the power module,
- a periodic current source that is connected to the at least one other interconnection for generating a periodic current flow through the at least one other interconnection in order to reach, in at least a part of the first interconnection, a predetermined temperature during a predetermined time duration.
The present invention concerns also the associated method.-
公开(公告)号：EP3382378A1
公开(公告)日：2018-10-03
申请号：EP17305366.1
申请日：2017-03-29
IPC分类号： G01N21/84 , G01R31/26 , G01R31/265 , G01R31/311 , G01N21/95 , H01L21/66
CPC分类号： G01N21/9501 , G01N21/8422 , G01R31/2642 , G01R31/2656 , G01R31/311 , H01L22/12
摘要： A device (1) comprising at least one power semiconductor die (3) coated with a metallization (5) and at least one light guide (7) having two opposite ends (71; 72). The first end (71) is able to be connected at least to a light source (11) and to a light receiver (13). The second end (72) is permanently fixed facing to a surface (51) of the metallization (5) such that to form a light path (91) towards said surface (51) and a light path (92) from said surface (51).
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