-
公开(公告)号：EP3335313A1
公开(公告)日：2018-06-20
申请号：EP16774732.8
申请日：2016-08-05
Applicant: Raytheon Company
Inventor： KAPER, Valery, S.
CPC classification number: H03F1/086 , H03F1/223 , H03F1/301 , H03F3/193 , H03F2200/18 , H03F2200/181 , H03F2200/411 , H03F2200/447 , H03F2200/451 , H03F2200/555
Abstract: A multi-stage amplifier having a first amplifier stage comprising: a pair of transistors arranged in a cascade amplifier arrangement; and an isolation circuit; and a second amplifier stage coupled to an output of the first amplifier stage; and bias regulator having a reference transistor. The cascode amplifier stage includes a pair of transistors arranged in a cascode amplifier arrangement. The bias regulator produces a reference current through the reference transistor and DC bias voltages for the control electrodes of each of the pair of transistors in the cascode amplifier arrangement and for the second stage's transistor as a function of the reference current through the reference transistor.
-
公开(公告)号：EP2380195B1
公开(公告)日：2018-09-12
申请号：EP10700798.1
申请日：2010-01-20
Applicant: Raytheon Company
Inventor： TABATABAIE, Kamal , DAVIS, Michael, S. , LAROCHE, Jeffrey, R. , KAPER, Valery, S. , BETTENCOURT, John, P.
IPC: H01L21/8258 , H01L23/485 , H01L23/532 , H01L27/06 , H01L27/092
CPC classification number: H01L21/8258 , H01L23/485 , H01L23/53238 , H01L27/0605 , H01L27/0623 , H01L27/0922 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor structure having a substrate, a seed layer over the substrate; a silicon layer disposed on the seed layer; a transistor device in the silicon layer; a III-V device disposed on the seed layer; and a plurality of electrical contacts, each one of the electrical contacts having a layer of TiN or TaN and a layer of copper or aluminum on the layer of TaN or TiN, one of the electrical contacts being electrically connected to the transistor and another one of the electrical contacts being electrically connected to the III-V device.
-
公开(公告)号：EP2380251B1
公开(公告)日：2020-08-12
申请号：EP10700799.9
申请日：2010-01-20
Applicant: Raytheon Company
Inventor： TABATABAIE, Kamal , LAROCHE, Jeffrey, R. , KAPER, Valery, S. , BETTENCOURT, John, P. , IP, Kelly, P.
-
公开(公告)号：EP1955439B1
公开(公告)日：2009-09-30
申请号：EP06837154.1
申请日：2006-11-08
Applicant: Raytheon Company
Inventor： ADLERSTEIN, Michael, G. , KAPER, Valery, S.
CPC classification number: H03L7/24 , G01S7/032 , G01S2013/0254 , H01Q3/30 , H01Q3/42
Abstract: A phase shifter (92, 17a..., 16n) includes a coupler (34)having a pair of output terminals for providing a pair of signals having a frequency f and having a relative phase shift difference of mp/2 radians, where m is an integer, and a switch (36) is included having a pair of inputs, each one of the pair of inputs being coupled to a corresponding one of output terminals of the coupler (34) . The switch (36) has an output, one of the inputs of the switch being coupled to the output of the switch selectively in accordance with a first control signal (39) fed to the switch. An oscillator (38) is included having a tunable resonant circuit (41) coupled to the output of the switch (36) , the frequency of the resonant circuit (41) being detuned from the nominal resonant frequency to shift the nominal resonant frequency relative to the harmonic of the signal at the output of the switch.
-
公开(公告)号：EP4457929A1
公开(公告)日：2024-11-06
申请号：EP22840462.0
申请日：2022-11-29
Applicant: Raytheon Company
Inventor： BETTENCOURT, John, P. , KAPER, Valery, S. , LARDIZABAL, Steven, M.
-
Patent Agency Ranking
公开(公告)号：EP3335312A1
公开(公告)日：2018-06-20
申请号：EP16751124.5
申请日：2016-08-05
Applicant: Raytheon Company
Inventor： KAPER, Valery, S.
CPC classification number: H03F1/301 , H03F1/0222 , H03F1/086 , H03F1/223 , H03F3/193 , H03F2200/18 , H03F2200/181 , H03F2200/411 , H03F2200/447 , H03F2200/451 , H03F2200/504 , H03F2200/72 , H03F2200/75
Abstract: An amplifier having a pair of transistors arranged in a cascode amplifier arrangement serially connected to a first voltage source. A DC bias regulator is provided having: a DC bias circuit for producing a reference voltage at a control electrode of a first one of the pair of transistors: and a voltage combiner having a pair of inputs, a first of the pair of inputs being coupled to the reference voltage and a second one of the pair of inputs being coupled to the first voltage source. The DC bias regulator produces a DC bias voltage at a control electrode of a second one of the pair of transistors related to a combination of the reference voltage and the first voltage source.
-
7.发明公开ELECTRICAL CONTACTS FOR CMOS DEVICES AND III-V DEVICES FORMED ON A SILICON SUBSTRATE 审中-公开FOR CMOS器件和部件III-V的电触点的硅衬底上
公开(公告)号：EP2380195A1
公开(公告)日：2011-10-26
申请号：EP10700798.1
申请日：2010-01-20
Applicant: Raytheon Company
Inventor： TABATABAIE, Kamal , DAVIS, Michael, S. , LAROCHE, Jeffrey, R. , KAPER, Valery, S. , BETTENCOURT, John, P.
IPC: H01L21/8258 , H01L23/485 , H01L27/06 , H01L27/092
CPC classification number: H01L21/8258 , H01L23/485 , H01L23/53238 , H01L27/0605 , H01L27/0623 , H01L27/0922 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor structure having a substrate, a seed layer over the substrate; a silicon layer disposed on the seed layer; a transistor device in the silicon layer; a III-V device disposed on the seed layer; and a plurality of electrical contacts, each one of the electrical contacts having a layer of TiN or TaN and a layer of copper or aluminum on the layer of TaN or TiN, one of the electrical contacts being electrically connected to the transistor and another one of the electrical contacts being electrically connected to the III-V device.
-
公开(公告)号：EP3724994A1
公开(公告)日：2020-10-21
申请号：EP18821855.6
申请日：2018-11-30
Applicant: Raytheon Company
Inventor： BETTENCOURT, John, P. , KAPER, Valery, S. , LARDIZABAL, Steven, M.
-
公开(公告)号：EP3213411B1
公开(公告)日：2019-07-17
申请号：EP15771449.4
申请日：2015-09-18
Applicant: Raytheon Company
Inventor： KAPER, Valery, S.
-
10.发明公开OUTPUT MATCHING NETWORK HAVING A SINGLE COMBINED SERIES AND SHUNT CAPACITOR COMPONENT 审中-公开具有单一组合系列和并联电容器组件的输出匹配网络
公开(公告)号：EP3213411A1
公开(公告)日：2017-09-06
申请号：EP15771449.4
申请日：2015-09-18
Applicant: Raytheon Company
Inventor： KAPER, Valery, S.
CPC classification number: H03H7/383 , H01L23/66 , H01L2223/6655 , H01L2223/6661 , H01L2224/48265 , H01L2924/1306 , H01L2924/14 , H01L2924/1421 , H01L2924/19041 , H01L2924/19104 , H03F1/56 , H03F3/195 , H03F3/245 , H03F2200/387
Abstract: A matching network requiring a predetermined shunt capacitance in a transformation of the impedance at the output to a transistor to a load. The matching network includes a vertically stacked shunt capacitor, for providing the entire predetermined capacitance, and a series DC blocking capacitor.
Abstract translation: 匹配网络在将输出端的阻抗变换到晶体管到负载时需要预定的分流电容。 匹配网络包括用于提供整个预定电容的垂直堆叠并联电容器和串联隔直流电容器。
-
-
-
-
-
-
-
-
-
Search Results
12
records
(took 0.014 seconds)
