公开(公告)号：EP3213411A1

公开(公告)日：2017-09-06

申请号：EP15771449.4

申请日：2015-09-18

申请人： Raytheon Company

发明人： KAPER, Valery, S.

IPC分类号： H03F1/56 ,  H03F3/195 ,  H03F3/24 ,  H01L23/66

CPC分类号： H03H7/383 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2223/6661 ,  H01L2224/48265 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/19041 ,  H01L2924/19104 ,  H03F1/56 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/387

摘要： A matching network requiring a predetermined shunt capacitance in a transformation of the impedance at the output to a transistor to a load. The matching network includes a vertically stacked shunt capacitor, for providing the entire predetermined capacitance, and a series DC blocking capacitor.

摘要翻译： 匹配网络在将输出端的阻抗变换到晶体管到负载时需要预定的分流电容。 匹配网络包括用于提供整个预定电容的垂直堆叠并联电容器和串联隔直流电容器。

公开(公告)号：EP3096353A1

公开(公告)日：2016-11-23

申请号：EP16169901.2

申请日：2016-05-17

申请人： Freescale Semiconductor, Inc.

发明人： Watts, Michael ,  Jones, Jeffrey Kevin ,  Zhu, Ning ,  Volokhine, Youri

IPC分类号： H01L23/66 ,  H01G4/30 ,  H01G4/38

CPC分类号： H03F1/565 ,  H01F27/2804 ,  H01F2027/2809 ,  H01G4/005 ,  H01G4/12 ,  H01G4/30 ,  H01G4/38 ,  H01G4/385 ,  H01G4/40 ,  H01L23/66 ,  H01L24/00 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6661 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/00015 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/451 ,  H03H7/38 ,  H05K1/111 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10166 ,  H01L2224/45099

摘要： A device includes multiple ceramic capacitors and a current path structure. A first ceramic capacitor includes a first ceramic material between first and second electrodes. A second ceramic capacitor includes a second ceramic material between third and fourth electrodes. The second ceramic material has a higher Q than the first ceramic material. The current path structure includes a lateral conductor located between the first and second ceramic materials, and first and second vertical conductors that extend from first and second ends of the lateral conductor to a device surface. The device may be coupled to a substrate of a packaged RF amplifier device, which also includes a transistor. For example, the device may form a portion of an output impedance matching circuit coupled between a current carrying terminal of the transistor and an output lead of the RF amplifier device.

摘要翻译： 所述的装置包括多个陶瓷电容器和一个电流路径结构。 第一陶瓷电容器包括第一电极和第二电极之间的第一陶瓷材料。 第二陶瓷电容器包括第三和第四电极之间的第二陶瓷材料。 第二陶瓷材料具有比第一陶瓷材料的更高的Q值。 电流路径结构包括位于所述第一和第二陶瓷材料，以及第一和第二垂直导体之间的横向导体并从横向导体的第一和第二端延伸到器件表面。 该设备可以被耦合到一个封装的RF放大器装置的底物，所以它包括一个晶体管。 对于实施例，该装置可以形成耦合在所述晶体管的载流端子之间和到RF放大器装置的输出引线的输出阻抗匹配电路的一部分。

公开(公告)号：EP2609626A4

公开(公告)日：2014-12-03

申请号：EP11820554

申请日：2011-08-23

申请人： DE ROCHEMONT L PIERRE

发明人： DE ROCHEMONT L PIERRE

IPC分类号： H01L29/66 ,  G06F1/32 ,  H01L23/64 ,  H01L23/66 ,  H01L25/16 ,  H01L29/423 ,  H01L29/43 ,  H01L29/739 ,  H01L29/78 ,  H01L49/02

CPC分类号： H01L27/0629 ,  G06F1/3203 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/528 ,  H01L23/64 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L25/16 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L29/0634 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/43 ,  H01L29/435 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7803 ,  H01L29/7831 ,  H01L2223/6627 ,  H01L2223/6661 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor FET provides a resonant gate and source and drain electrodes, wherein the resonant gate is electromagnetically resonant at one or more predetermined frequencies.

公开(公告)号：EP3324433A1

公开(公告)日：2018-05-23

申请号：EP17201709.7

申请日：2017-11-14

申请人： Infineon Technologies AG

发明人： SIMCOE, Michael

IPC分类号： H01L23/485 ,  H03F1/02 ,  H01L23/48 ,  H01L23/66 ,  H01L23/00 ,  H01L23/538 ,  H01L25/07

CPC分类号： H01L23/66 ,  H01L21/4846 ,  H01L22/20 ,  H01L23/48 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/5389 ,  H01L24/80 ,  H01L25/072 ,  H01L25/50 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2223/6661 ,  H01P3/081 ,  H03F1/0288 ,  H03F3/19 ,  H03F3/211 ,  H03F3/60 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/387 ,  H03F2200/423 ,  H03F2200/451 ,  H03F2203/21103 ,  H03F2203/21139 ,  H03H7/38

摘要： An RF power package includes a substrate having a metallized part and an insulating part, an RF power transistor die embedded in or attached to the substrate, the RF power transistor die having a die input terminal, a die output terminal, an input impedance and an output impedance, a package input terminal formed in the metallized part or attached to the insulating part of the substrate, a package output terminal formed in the metallized part or attached to the insulating part of the substrate, and a first plurality of planar tuning lines formed in the metallized part of the substrate and electrically connecting the die output terminal to the package output terminal. The first plurality of planar tuning lines is shaped so as to transform the output impedance at the die output terminal to a higher target level at the package output terminal.

公开(公告)号：EP3109872A4

公开(公告)日：2018-01-03

申请号：EP15748496

申请日：2015-02-17

申请人： HITACHI METALS LTD

发明人： MORITSUGU NAKAO ,  OGURA KATSUHIRO

IPC分类号： H01F27/25 ,  H01F3/04 ,  H01F41/02

CPC分类号： H01F3/04 ,  H01F27/25 ,  H01F41/0226 ,  H01L23/66 ,  H01L2223/6661

摘要： This core for a high-frequency transformer has shape formed by a single roll process by winding a Fe-based nanocrystal alloy thin strip (1) that has a roll contact surface (2) and a free surface (3) while interposing an insulating layer (4), characterized in that projections (5) having a crater-form depression are dispersed on the free surface (3) of the Fe-based nanocrystal alloy thin strip (1), and the apexes of the projections (5) are ground and blunted.

公开(公告)号：EP3206228A1

公开(公告)日：2017-08-16

申请号：EP17152734.4

申请日：2017-01-24

申请人： Semtech Corporation

发明人： CHINNUSAMY, Satyamoorthi ,  TAN, Weng Hing ,  REYES, Jayson Nathaniel S.

IPC分类号： H01L23/498 ,  H01L21/48

CPC分类号： H01L23/66 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/56 ,  H01L21/561 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49844 ,  H01L23/642 ,  H01L23/645 ,  H01L23/647 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2223/6661 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49052 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/45099

摘要： A semiconductor device includes a substrate and a first conductive layer formed over a first surface of the substrate. The first conductive layer is patterned into a first portion of a first passive circuit element. The first conductive layer is patterned to include a first coiled portion. A second conductive layer is formed over a second surface of the substrate. The second conductive layer is patterned into a second portion of the first passive circuit element. The second conductive layer is patterned to include a second coiled portion exhibiting mutual inductance with the first coiled portion. A conductive via formed through the substrate is coupled between the first conductive layer and second conductive layer. A semiconductor component is disposed over the substrate and electrically coupled to the first passive circuit element. An encapsulant is deposited over the semiconductor component and substrate. The substrate is mounted to a printed circuit board.

摘要翻译： 一种半导体器件包括衬底和在衬底的第一表面上方形成的第一导电层。 第一导电层被图案化为第一无源电路元件的第一部分。 第一导电层被图案化以包括第一盘绕部分。 第二导电层形成在衬底的第二表面之上。 第二导电层被图案化为第一无源电路元件的第二部分。 第二导电层被图案化以包括与第一线圈部分呈现互感的第二线圈部分。 穿过衬底形成的导电通孔耦合在第一导电层和第二导电层之间。 半导体元件设置在衬底上并电耦合到第一无源电路元件。 密封剂沉积在半导体部件和衬底上。 基板安装在印刷电路板上。

公开(公告)号：EP2609626A1

公开(公告)日：2013-07-03

申请号：EP11820554.1

申请日：2011-08-23

申请人： De Rochemont, L. Pierre

发明人： De Rochemont, L. Pierre

IPC分类号： H01L29/66

CPC分类号： H01L27/0629 ,  G06F1/3203 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/528 ,  H01L23/64 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L25/16 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L29/0634 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/43 ,  H01L29/435 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7803 ,  H01L29/7831 ,  H01L2223/6627 ,  H01L2223/6661 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor FET provides a resonant gate and source and drain electrodes, wherein the resonant gate is electromagnetically resonant at one or more predetermined frequencies.

公开(公告)号：EP3178162A4

公开(公告)日：2018-04-04

申请号：EP14899177

申请日：2014-08-07

申请人： INTEL CORP

发明人： GOLDMAN RICHARD J ,  LEE KEVIN J ,  SARASWAT RUCHIR ,  ZILLMANN UWE ,  COWLEY NICHOLAS P

IPC分类号： H03H7/00 ,  G06F1/16 ,  H01F27/28 ,  H01L21/77 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L23/525 ,  H01L23/552 ,  H01L23/66 ,  H03H7/42 ,  H03H9/64 ,  H04B1/00

CPC分类号： H01L24/09 ,  G06F1/16 ,  H01F27/2804 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/525 ,  H01L23/645 ,  H01L23/66 ,  H01L24/17 ,  H01L2223/6616 ,  H01L2223/6661 ,  H01L2223/6677 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2924/0002 ,  H03H7/42 ,  H03H9/64 ,  H01L2924/00

摘要： Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.

公开(公告)号：EP3069383B1

公开(公告)日：2018-01-03

申请号：EP14803289.9

申请日：2014-11-06

申请人： Qualcomm Incorporated

发明人： BHAGAT, Maulin Pareshbhai ,  MYERS, Thomas Andrew ,  NAN, Lan ,  JIN, Zhang

IPC分类号： H01L23/522 ,  H01L23/64 ,  H01L49/02 ,  H01L23/66 ,  H01F38/14 ,  H01L27/10

CPC分类号： H04B5/0075 ,  H01F38/14 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L27/101 ,  H01L28/10 ,  H01L2223/6661 ,  H01L2223/6688 ,  H01L2924/0002 ,  H03H7/0115 ,  H01L2924/00

摘要： A tunable guard ring for improved circuit isolation is disclosed. In an exemplary embodiment, an apparatus includes a closed loop guard ring formed on an integrated circuit and magnetically coupled by a selected coupling factor to a first inductor formed on the integrated circuit. The apparatus also includes a tunable capacitor forming a portion of the closed loop guard ring and configured to reduce magnetic field coupling from the first inductor to a second inductor.

公开(公告)号：EP3178162A1

公开(公告)日：2017-06-14

申请号：EP14899177.1

申请日：2014-08-07

申请人： Intel Corporation

发明人： GOLDMAN, Richard J. ,  LEE, Kevin J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas P.

IPC分类号： H03H7/00 ,  H04B1/00

CPC分类号： H01L24/09 ,  G06F1/16 ,  H01F27/2804 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/525 ,  H01L23/645 ,  H01L23/66 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2223/6616 ,  H01L2223/6661 ,  H01L2223/6677 ,  H01L2224/0233 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H03H7/42 ,  H03H9/64

摘要： Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.

摘要翻译： 所描述的是，它包括一个设备，包括：第一对具有再分布层（RDL）的的背面侧; 和设置在背面侧的一个或多个无源平面器件，所述一个或多个无源平面器件形成在RDL。