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    Tunable laser device
    2.
    发明公开
    Tunable laser device 审中-公开
    可调激光器

    公开(公告)号：EP2894734A1

    公开(公告)日：2015-07-15

    申请号：EP14305050.8

    申请日：2014-01-14

    Applicant: ALCATEL LUCENT

    Inventor： Debregeas-Sillard, Hélène ,  Chimot, Nicolas

    IPC: H01S5/0625 ,  H01S5/40 ,  H01S5/026 ,  G02B6/12 ,  H04J14/02 ,  H04B10/50

    CPC classification number: H01S5/4031 ,  G02B6/12004 ,  G02B6/4214 ,  G02B6/4286 ,  G02B2006/12078 ,  G02B2006/12121 ,  G02B2006/12164 ,  H01S5/02415 ,  H01S5/026 ,  H01S5/0264 ,  H01S5/0265 ,  H01S5/06258 ,  H04B10/506

    Abstract: A photonic integrated circuit PIC (16) comprising a semiconductor substrate layer and a plurality of tunable Distributed Feedback lasers (1, 100, 401), wherein each DFB laser of the PIC has a phase section in passive material longitudinally located between Bragg sections in active material, wherein the tuning device of each DFB laser includes an electrode (15) arranged on the phase section, the electrode being connected to an electrical source for applying an electrical signal to the phase section, the electrode being able to inject current in the phase section of the DFB laser to tune the emission wavelength of said DFB laser, and wherein the current injection by the electrode in the phase section causes an optical path variation in the phase section and wherein the amplitude of the optical path variation in the phase section is equal to or greater than the optical path of one grating pitch of the Bragg grating.

    Abstract translation: 一种包括半导体衬底层和多个可调分布式反馈激光器（1,100,401）的光子集成电路PIC（16），其中PIC的每个DFB激光器具有在无源材料中的相位部分，所述相位部分纵向地位于布拉格部分之间， 材料，其中每个DFB激光器的调谐装置包括布置在相部分上的电极（15），该电极连接到用于向相部分施加电信号的电源，该电极能够在相中注入电流 以调谐所述DFB激光器的发射波长，并且其中由相位部分中的电极注入的电流引起相位部分中的光路变化，并且其中相位部分中的光路变化的幅度是 等于或大于布拉格光栅的一个光栅间距的光路。

    INTEGRATION CMOS COMPATIBLE OF MICRO/NANO OPTICAL GAIN MATERIALS
    3.
    发明公开
    INTEGRATION CMOS COMPATIBLE OF MICRO/NANO OPTICAL GAIN MATERIALS 审中-公开
    与微/纳米光学增强材料兼容CMOS集成

    公开(公告)号：EP2319142A1

    公开(公告)日：2011-05-11

    申请号：EP09810562.0

    申请日：2009-08-27

    Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

    Inventor： CAROTHERS, Daniel, N.

    IPC: H01S5/00

    CPC classification number: H01S5/026 ,  G02B6/13 ,  G02B2006/12078 ,  G02B2006/12097 ,  H01L21/8258 ,  Y10T428/31678

    Abstract: A method is provided for the integration of an optical gain material into a Complementary metal oxide semi conductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the InP remaining on epitaxy layer with hydrochloric acid; depositing at least one Oxide pad on revealed the epitaxy layer; using the Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level; etching with a patterned inductively coupled plasma (ICP) technique; isolating the device on the substrate with additional pattern etching patterning contacts, appl ing the contacts.

    PHOTONIC INTEGRATED CIRCUIT (PIC) AND SILICON PHOTONICS (SIP) CIRCUITRY DEVICE
    6.
    发明公开
    PHOTONIC INTEGRATED CIRCUIT (PIC) AND SILICON PHOTONICS (SIP) CIRCUITRY DEVICE 审中-公开
    光电集成电路（PIC）和硅光子（SIP）电路设备

    公开(公告)号：EP3035096A3

    公开(公告)日：2016-07-06

    申请号：EP15201033.6

    申请日：2015-12-18

    Applicant: Infinera Corporation

    Inventor： Osenbach, John W. ,  Butrie, Timothy ,  Kish, Fred A. ,  Reffle, Michael

    IPC: G02B6/42 ,  G02B6/12 ,  G02B6/13

    CPC classification number: G02B6/4251 ,  G02B6/12004 ,  G02B6/13 ,  G02B6/136 ,  G02B6/4215 ,  G02B6/4219 ,  G02B6/423 ,  G02B6/4257 ,  G02B6/4273 ,  G02B6/4274 ,  G02B2006/12035 ,  G02B2006/12061 ,  G02B2006/12078

    Abstract: A device may include a first substrate. The device may include an optical source. The optical source may generate light when a voltage or current is applied to the optical source. The optical source may be being provided on a first region of the first substrate. The device may include a second substrate. A second region of the second substrate may form a cavity with the first region of the first substrate. The optical source may extend into the cavity. The device may include an optical interconnect. The optical interconnect may be provided on or in the second substrate and outside the cavity. The optical interconnect may be configured to receive the light from the optical source.

    Abstract translation: 器件可以包括第一衬底。 该设备可以包括光源。 当电压或电流施加到光源时，光源可以产生光。 光源可以设置在第一基板的第一区域上。 该装置可以包括第二基板。 第二衬底的第二区域可与第一衬底的第一区域形成空腔。 光源可以延伸到空腔中。 该设备可以包括光学互连。 光学互连可以设置在第二基板之上或之中并且在空腔之外。 光学互连可以被配置为接收来自光源的光。

    PHOTONIC INTEGRATED CIRCUIT (PIC) AND SILICON PHOTONICS (SIP) CIRCUITRY DEVICE
    7.
    发明公开
    PHOTONIC INTEGRATED CIRCUIT (PIC) AND SILICON PHOTONICS (SIP) CIRCUITRY DEVICE 审中-公开
    光电集团（PIC）UND SILIIUM-PHOTONIK（SIP）-SCHALTVORRICHTUNG

    公开(公告)号：EP3035096A2

    公开(公告)日：2016-06-22

    申请号：EP15201033.6

    申请日：2015-12-18

    Applicant: Infinera Corporation

    Inventor： Osenbach, John W. ,  Butrie, Timothy ,  Kish, Fred A. ,  Reffle, Michael

    IPC: G02B6/42 ,  G02B6/12 ,  G02B6/13

    CPC classification number: G02B6/4251 ,  G02B6/12004 ,  G02B6/13 ,  G02B6/136 ,  G02B6/4215 ,  G02B6/4219 ,  G02B6/423 ,  G02B6/4257 ,  G02B6/4273 ,  G02B6/4274 ,  G02B2006/12035 ,  G02B2006/12061 ,  G02B2006/12078

    Abstract: A device may include a first substrate. The device may include an optical source. The optical source may generate light when a voltage or current is applied to the optical source. The optical source may be being provided on a first region of the first substrate. The device may include a second substrate. A second region of the second substrate may form a cavity with the first region of the first substrate. The optical source may extend into the cavity. The device may include an optical interconnect. The optical interconnect may be provided on or in the second substrate and outside the cavity. The optical interconnect may be configured to receive the light from the optical source.

    Abstract translation: 器件可以包括第一衬底。 该装置可以包括光源。 当向光源施加电压或电流时，光源可以产生光。 光源可以设置在第一衬底的第一区域上。 该装置可以包括第二基板。 第二基板的第二区域可以与第一基板的第一区域形成空腔。 光源可以延伸到腔中。 该装置可以包括光学互连。 光学互连可以设置在第二基板上或第二基板中并且在空腔外部。 光学互连可以被配置为接收来自光源的光。

    A photonic device and a method of manufacturing a photonic device
    9.
    发明公开
    A photonic device and a method of manufacturing a photonic device 有权
    Photonische Vorrichtung und Verfahren zur Herstellung einer photonischen Vorrichtung

    公开(公告)号：EP2403077A1

    公开(公告)日：2012-01-04

    申请号：EP10290361.4

    申请日：2010-06-30

    Applicant: Alcatel Lucent

    Inventor： Jany, Christophe ,  Alexandre, François

    IPC: H01S5/026 ,  H01S5/20 ,  H01S5/22 ,  H01S5/227

    CPC classification number: H01S5/026 ,  G02B2006/12078 ,  G02B2006/121 ,  H01S5/0265 ,  H01S5/2086 ,  H01S5/2224 ,  H01S5/2275

    Abstract: A photonic device and a method of manufacturing a photonic device, wherein on a doped semiconductor substrate (DSS), by monolithic integration, at least one active component (AC1) and at least one passive component (PC) coupled together are produced, each active component (AC1) being laterally buried by means of a semi-insulating semiconductor (SIS) and vertically buried by means of a doped semiconductor cladding layer (CL), in order to have a heterojunction structure, and each passive component (PC) being laterally and vertically buried by means of this semi-insulating semiconductor (SIS).
    The active components (AC1,AC2) comprise an intrinsic layer (IL) in addition to the layers of the passive components (PC).

    Abstract translation: 一种光子器件和一种制造光子器件的方法，其中通过单片整合在掺杂半导体衬底（DSS）上产生耦合在一起的至少一个有源元件（AC1）和至少一个无源元件（PC），每个有源元件 （AC1）通过半绝缘半导体（SIS）横向掩埋，并通过掺杂半导体覆层（CL）垂直埋入，以便具有异质结结构，并且每个被动元件（PC）是横向的 并通过该半绝缘半导体（SIS）垂直埋入。 活性组分（AC1，AC2）除了无源组分（PC）的层之外还包含本征层（IL）。

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