公开(公告)号：EP2858107A3

公开(公告)日：2015-10-21

申请号：EP14176759.0

申请日：2014-07-11

申请人： Kabushiki Kaisha Toshiba

发明人： Matsushita, Keiichi ,  Sasaki, Yo

IPC分类号： H01L23/373 ,  H01L21/58 ,  H01L23/10 ,  H01L21/50

CPC分类号： H01L23/3736 ,  H01L21/50 ,  H01L23/10 ,  H01L23/142 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/0346 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2743 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83379 ,  H01L2224/83447 ,  H01L2224/83825 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/161 ,  H01L2924/16195 ,  H01L2924/163 ,  H01L2924/171 ,  H01L2924/2064 ,  H01L2224/05644 ,  H01L2924/00012 ,  H01L2224/06164 ,  H01L2224/45099

摘要： According to one embodiment, a semiconductor device (110) includes a semiconductor element (20), a mounting member (70) including Cu, and a bonding layer (50) provided between the semiconductor element (20) and the mounting member (70). The bonding layer (50) includes a first region (R1) including Ti and Cu, and a second region (R2) provided between the first region (R1) and the mounting member (70), and including Sn and Cu. A first position (P1) along the first direction is positioned between the semiconductor element (20) and a second position (P2) along the first direction. The first position (P1) is where the composition ratio (51r) of Ti in the first region (R1) is 0.1 times a maximum value (51x) of the composition ratio (51r) of Ti. The second position (P2) is where the composition ratio (52r) of Sn in the second region (R2) is 0.1 times a maximum value (52x) of the composition ratio (52r) of Sn. A distance (L1) between the first position (P1) and the second position (P2) is not less than 0.1 micrometres.
According to another embodiment, a semiconductor device (120) includes a semiconductor element (20), a mounting member (70) including Cu, a first layer (41) provided between the semiconductor element (20) and the mounting member (70), the first layer (41) including Ti, a second layer (42) provided between the first layer (41) and the mounting member (70), the second layer (42) including Sn and Cu and a third layer (43) provided between the first layer (41) and the second layer (42), the third layer (43) including at least one selected from Ni, Pt, and Pd.
In both embodiments, the semiconductor device (110, 120) is formed by bonding the semiconductor element (20) to the mounting member (70) by solid solution bonding.
Thereby, a semiconductor device (110, 120) having good heat dissipation and high productivity can be provided.

公开(公告)号：EP2858107A2

公开(公告)日：2015-04-08

申请号：EP14176759.0

申请日：2014-07-11

申请人： Kabushiki Kaisha Toshiba

发明人： Matsushita, Keiichi ,  Sasaki, Yo

IPC分类号： H01L23/373 ,  H01L21/58

CPC分类号： H01L23/3736 ,  H01L21/50 ,  H01L23/10 ,  H01L23/142 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/0346 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2743 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83379 ,  H01L2224/83447 ,  H01L2224/83825 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/161 ,  H01L2924/16195 ,  H01L2924/163 ,  H01L2924/171 ,  H01L2924/2064 ,  H01L2224/05644 ,  H01L2924/00012 ,  H01L2224/06164 ,  H01L2224/45099

摘要： According to one embodiment, a semiconductor device (110) includes a semiconductor element (20), a mounting member (70) including Cu, and a bonding layer (50) provided between the semiconductor element (20) and the mounting member (70). The bonding layer (50) includes a first region (R1) including Ti and Cu, and a second region (R2) provided between the first region (R1) and the mounting member (70), and including Sn and Cu. A first position (P1) along the first direction is positioned between the semiconductor element (20) and a second position (P2) along the first direction. The first position (P1) is where the composition ratio (51r) of Ti in the first region (R1) is 0.1 times a maximum value (51x) of the composition ratio (51r) of Ti. The second position (P2) is where the composition ratio (52r) of Sn in the second region (R2) is 0.1 times a maximum value (52x) of the composition ratio (52r) of Sn. A distance (L1) between the first position (P1) and the second position (P2) is not less than 0.1 micrometres.
According to another embodiment, a semiconductor device (120) includes a semiconductor element (20), a mounting member (70) including Cu, a first layer (41) provided between the semiconductor element (20) and the mounting member (70), the first layer (41) including Ti, a second layer (42) provided between the first layer (41) and the mounting member (70), the second layer (42) including Sn and Cu and a third layer (43) provided between the first layer (41) and the second layer (42), the third layer (43) including at least one selected from Ni, Pt, and Pd.
In both embodiments, the semiconductor device (110, 120) is formed by bonding the semiconductor element (20) to the mounting member (70) by solid solution bonding.
Thereby, a semiconductor device (110, 120) having good heat dissipation and high productivity can be provided.

摘要翻译： 。根据一个实施例，一种半导体器件（110）包括半导体元件（20）和所述安装部件之间提供了一种半导体元件（20），包含Cu的安装构件（70），以及结合层（50）（70） ， 该粘结层（50）包括第一区域（R1）包括TI和Cu，并且所述第一区域（R1）和所述安装构件（70）和含有Sn和Cu之间的第二区域（R2）。 沿第一方向的第一位置（P1）设置在半导体元件（20）和沿着所述第一方向的第二位置（P2）之间的位置。 第一位置（P1）是其中，Ti在第一区域（R1）的组成比（51R）为Ti的组成比（51R）的0.1倍的最大值（51X），第二位置（P2）是其中 在第二区域（R2）Sn的组成比（52R）为Sn的组成比（52R）的0.1倍的最大值（52X）。 第一位置（P1）和第二位置（P2）之间的距离（L1）为不小于0.1微米。 。根据另一个实施例，一种半导体器件（120）包括一个半导体元件（20），一个安装构件（70）包含Cu，半导体元件（20）和所述安装构件（70）之间提供的第一层（41）， 所述第一层（41）包含的Ti，之间设置含有Sn和Cu和第三层（43），所述第一层（41）和所述安装构件（70），第二层（42）之间的第二层（42） 所述第一层（41）和第二层（42），第三层（43）包括至少一个选自Ni，Pt和Pd中选择。 在两个实施例中，半导体器件（110,120）由所述半导体元件（20），以通过固溶接合所述安装构件（70）接合而形成。 由此，可以提供具有良好的散热和高生产率的半导体装置（110，120）。