公开(公告)号：EP4362105A3

公开(公告)日：2024-07-31

申请号：EP23203382.9

申请日：2023-10-13

Applicant: Northrop Grumman Systems Corporation

Inventor： COFFIE, Robert

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20

CPC classification number: H01L29/7783 ,  H01L29/2003 ,  H01L29/205

Abstract: A high electron mobility transistor (HEMT) device including a substrate (12), an AlGaN buffer layer (16) on the substrate, where the buffer layer has a percentage of AI between 1% and 6%, an InGaN layer (20) on the buffer layer, where the InGaN layer has about 10% of In, a GaN channel layer (22) on the InGaN layer, and an AlGaN barrier layer (26) on the channel layer. In one embodiment, the buffer layer is Al0.04Ga0.96N, the InGaN layer is about 2 nm thick, and the barrier layer is Al0.34Ga0.66N. The HEMT device may include a nucleation layer (14) between the substrate and the buffer layer, a GaN spacer layer (18) between the buffer layer and the InGaN layer, and/or an AIN interlayer (24) between the channel layer and the barrier layer.

公开(公告)号：EP4401148A1

公开(公告)日：2024-07-17

申请号：EP24150687.2

申请日：2024-01-08

Applicant: Sumitomo Electric Device Innovations, Inc.

Inventor： MARUYAMA, Hiroaki

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/417

CPC classification number: H01L29/2003 ,  H01L29/41766 ,  H01L23/481 ,  H01L29/7783

Abstract: A semiconductor device of the present disclosure includes a substrate; a buffer layer above the substrate; a barrier layer on the buffer layer; an electron traveling layer on the barrier layer; and an electron supply layer above the electron traveling layer. The electron traveling layer is thinner than the buffer layer. A band gap of the barrier layer is larger than a band gap of the buffer layer and a band gap of the electron traveling layer.

公开(公告)号：EP4362105A2

公开(公告)日：2024-05-01

申请号：EP23203382.9

申请日：2023-10-13

Applicant: Northrop Grumman Systems Corporation

Inventor： COFFIE, Robert

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20

CPC classification number: H01L29/7783 ,  H01L29/2003 ,  H01L29/205

Abstract: A high electron mobility transistor (HEMT) device including a substrate (12), an AlGaN buffer layer (16) on the substrate, where the buffer layer has a percentage of AI between 1% and 6%, an InGaN layer (20) on the buffer layer, where the InGaN layer has about 10% of In, a GaN channel layer (22) on the InGaN layer, and an AlGaN barrier layer (26) on the channel layer. In one embodiment, the buffer layer is Al0.04Ga0.96N, the InGaN layer is about 2 nm thick, and the barrier layer is Al0.34Ga0.66N. The HEMT device may include a nucleation layer (14) between the substrate and the buffer layer, a GaN spacer layer (18) between the buffer layer and the InGaN layer, and/or an AIN interlayer (24) between the channel layer and the barrier layer.

公开(公告)号：EP2793270B1

公开(公告)日：2018-06-06

申请号：EP14164151.4

申请日：2014-04-10

Applicant: LG Electronics Inc.

Inventor： Shin, Jonghoon ,  Kim, Woongsun ,  Jang, Taehoon

IPC: H01L29/778 ,  H01L21/335 ,  H01L21/20

CPC classification number: H01L29/7783 ,  H01L21/02241 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: This specification relates to an enhancement-type semiconductor device having a passivation layer formed using a photoelectrochemical (PEC) method, and a fabricating method thereof. To this end, a semiconductor device according to one exemplary embodiment includes a GaN layer (110), an AlGaN layer (120) formed on the GaN layer (110), a p-GaN layer (130) formed on the AlGaN layer (120), a gate electrode (150) formed on the p-GaN layer (130), a source electrode (160) and a drain electrode (170) formed on a partial region of the AlGaN layer (120), and a passivation layer (140) formed on a partial region of the AlGaN layer (120), the passivation layer (140) formed between the source electrode (160) and the gate electrode (150) or between the gate electrode (150) and the drain electrode (170), wherein the passivation layer is formed in a manner of oxidizing a part of the p-GaN layer (130).

公开(公告)号：EP2117040B1

公开(公告)日：2018-05-16

申请号：EP07715024.1

申请日：2007-02-27

Applicant: Fujitsu Limited

Inventor： KIKKAWA, Toshihide

IPC: H01L21/338 ,  H01L29/778 ,  H01L29/80 ,  H01L29/812

CPC classification number: H01L29/7783 ,  H01L29/0649 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7788

Abstract: A vertical type GaN series field effect transistor having excellent pinch-off characteristics is provided. A compound semiconductor device includes a conductive semiconductor substrate, a drain electrode formed on a bottom surface of the conductive semiconductor substrate, a current blocking layer formed on a top surface of the conductive semiconductor substrate, made of high resistance compound semiconductor or insulator, and having openings, an active layer of compound semiconductor burying the openings and extending on an upper surface of the current blocking layer, a gate electrode formed above the openings and above the active layer, and a source electrode formed laterally spaced from the gate electrode and formed above the active layer.

公开(公告)号：EP3312870A1

公开(公告)日：2018-04-25

申请号：EP17204609.6

申请日：2014-05-30

Applicant: NGK Insulators, Ltd.

Inventor： KURAOKA, Yoshitaka ,  ICHIMURA, Mikiya ,  IWAI, Makoto

IPC: H01L21/338 ,  H01L29/778 ,  H01L29/207 ,  H01L21/205 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1029 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786

Abstract: Provided are a group 13 nitride composite substrate allowing for the production of a semiconductor device suitable for high-frequency applications while including a conductive GaN substrate, and a semiconductor device produced using this substrate. The group 13 nitride composite substrate includes a base substrate of an n-conductivity type formed of GaN, a base layer located on the base substrate, being a group 13 nitride layer having a resistivity of 1×10 6 Ω·cm or more, a channel layer located on the base layer, being a GaN layer having a total impurity density of 1×10 17 /cm 3 or less, and a barrier layer that is located on the channel layer and is formed of a group 13 nitride having a composition Al x In y Ga 1-x-y N (0≤x≤1, 0≤y≤1).

Abstract translation: 本发明提供一种第13族氮化物复合基板以及使用该基板制造的半导体装置，该第13族氮化物复合基板能够制造适合于高频用途的半导体装置，并且具有导电性的GaN基板。 第13族氮化物复合衬底包括由GaN形成的n型导电类型的基底衬底，位于衬底基底上的基底层，基底层为电阻率为1×106Ω·cm以上的13族氮化物层，沟道 其位于基底层上，是总杂质密度为1×1017 / cm3或更小的GaN层，以及位于沟道层上并由具有组分AlxInyGa1-x的13族氮化物形成的阻挡层 -yN（0≤x≤1,0≤y≤1）。

公开(公告)号：EP2741319B1

公开(公告)日：2017-10-11

申请号：EP12820550.7

申请日：2012-07-24

Applicant: Murata Manufacturing Co., Ltd.

Inventor： SAEKI, Hiromasa

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/423 ,  H01L21/335 ,  H01L29/51

CPC classification number: H01L29/105 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787

公开(公告)号：EP2567404B1

公开(公告)日：2017-07-12

申请号：EP11722569.8

申请日：2011-05-02

Applicant: Visic Technologies Ltd.

Inventor： BUNIN, Gregory ,  BAKSHT, Tamara ,  ROZMAN, David

IPC: H01L29/778 ,  H01L29/423 ,  H01L27/088

CPC classification number: H01L29/7787 ,  H01L24/45 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/7783 ,  H01L2224/45124 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2924/00014

公开(公告)号：EP3007215A4

公开(公告)日：2017-06-07

申请号：EP14807779

申请日：2014-05-30

Applicant: NGK INSULATORS LTD

Inventor： KURAOKA YOSHITAKA ,  ICHIMURA MIKIYA ,  IWAI MAKOTO

IPC: H01L21/338 ,  H01L21/205 ,  H01L29/20 ,  H01L29/207 ,  H01L29/778

CPC classification number: H01L29/7787 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1029 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786

公开(公告)号：EP3041053A3

公开(公告)日：2016-09-14

申请号：EP15197623.0

申请日：2015-12-02

Applicant: Renesas Electronics Corporation

Inventor： MIYAKE, Shinichi ,  NAKAYAMA, Tatsuo

IPC: H01L29/778 ,  H01L29/423 ,  H01L21/336 ,  H01L29/43 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7785 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a buffer layer (BU), a channel layer (CH), a barrier layer (BA), and a gate electrode (GE) over a substrate (S), the gate electrode being disposed in a first opening (OA2) with a gate insulating film (GI) in between, the first opening running down to the middle of the channel layer through the barrier layer. The concentration of two-dimensional electron gas in a first region (ASB) on either side of the first opening is controlled to be lower than the concentration of two-dimensional electron gas in a second region (AF) between an end of the first region and a source (SE) or drain (DE) electrode. The concentration of the two-dimensional electron gas in the first region is thus decreased, thereby the conduction band-raising effect of polarization charge is prevented from being reduced. This prevents a decrease in threshold potential, and thus improves normally-off operability.