公开(公告)号：EP4354514A3

公开(公告)日：2024-07-10

申请号：EP23187310.0

申请日：2023-07-24

申请人： Tamura Corporation ,  Novel Crystal Technology, Inc.

发明人： OTSUKA, Fumio

IPC分类号： H01L29/872 ,  H01L29/06 ,  H01L21/425 ,  H01L29/24

CPC分类号： H01L29/8725 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/66969 ,  H01L29/24 ,  H01L21/425 ,  H01L29/0657 ,  H01L29/872 ,  H01L29/0623

摘要： A Schottky barrier diode includes a semiconductor layer of a first conductivity type including a wide-bandgap semiconductor and a trench defining a mesa portion on a first surface thereof, a high-resistance region under the trench of the semiconductor layer, the high-resistance region including an impurity of a second conductivity type different from the first conductivity type, an insulating film or a semiconductor film of the second conductivity type, the insulating film or semiconductor film covering at least a bottom surface among inner surfaces of the trench, an anode electrode on the semiconductor layer through the insulating film or the semiconductor film, the anode electrode being connected to the mesa portion, and a cathode electrode directly or through another layer on a second surface of the semiconductor layer on the opposite side to the first surface.

公开(公告)号：EP1145327B2

公开(公告)日：2018-05-02

申请号：EP99971151.8

申请日：1999-10-20

申请人： Giant Holdings, Inc.

发明人： BALIGA, Bantval, Jayant

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/095 ,  H01L29/40 ,  H01L29/08 ,  H01L29/872

CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L27/088 ,  H01L27/095 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/42368 ,  H01L29/7806 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/8725 ,  H01L2924/0002 ,  H01L2924/00

摘要： Integrated power semiconductor devices having improved high frequency switching performance, improved edge termination characteristics and reduced on-state resistance include GD-UMOSFET unit cells with upper trench-based gate electrodes and lower trench-based source electrodes. The use of the trench-based source electrode instead of a larger gate electrode reduces the gate-to-drain capacitance (CGD) of the UMOSFET and improves switching speed by reducing the amount of gate charging and discharging current that is needed during high frequency operation.

公开(公告)号：EP3092659A4

公开(公告)日：2017-07-26

申请号：EP14877719

申请日：2014-11-10

申请人： VISHAY GEN SEMICONDUCTOR LLC

发明人： LIN YI-YU ,  CHANG CHUN-CHUEH ,  KUNG PU JU

IPC分类号： H01L29/872 ,  H01L21/329 ,  H01L29/40

CPC分类号： H01L29/0634 ,  H01L29/0661 ,  H01L29/407 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8725

公开(公告)号：EP2462620B1

公开(公告)日：2017-05-17

申请号：EP10721038.7

申请日：2010-06-09

申请人： Robert Bosch GmbH

发明人： QU, Ning ,  GOERLACH, Alfred

IPC分类号： H01L29/872 ,  H01L21/329 ,  H01L29/06

CPC分类号： H01L29/8725 ,  H01L29/0623 ,  H01L29/0626 ,  H01L29/66143

公开(公告)号：EP3038163A1

公开(公告)日：2016-06-29

申请号：EP15197325.2

申请日：2015-12-01

申请人： IMEC VZW ,  Katholieke Universiteit Leuven

发明人： Hu, Jie

IPC分类号： H01L29/872 ,  H01L29/205 ,  H01L29/417 ,  H01L21/329

CPC分类号： H01L29/8725 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/417 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/872

摘要： A group III-N lateral Schottky diode is disclosed comprising a substrate (2), a nucleation layer (3) formed on the substrate (2), a buffer layer (4) formed on the nucleation layer (3), a group III-N channel stack (5) formed on the buffer layer (4), formed on the channel stack (5) a group III-N barrier (6) containing Aluminium whereby the Aluminium content of the barrier (6) decreases towards the channel stack (5), a passivation layer (8) formed on the group III-N barrier (6), a cathode (11) formed in an opening (9) through the passivation layer (8) whereby the opening (9) at least extends to the barrier (6), and; an anode (13) formed in another opening (10) through the passivation layer (8) thereby partially extending into the barrier (6), the anode forming a Schottky contact with the barrier (6).

摘要翻译： 公开了一种组III-N侧向肖特基二极管，其包括基板（2），形成在基板（2）上的成核层（3），形成在成核层（3）上的缓冲层（4） 形成在缓冲层（4）上的N沟道堆叠（5），形成在沟道堆叠（5）上，包含铝的III-N族阻挡层（6），由此阻挡层（6）的铝含量朝向沟道堆叠（ 5），形成在III-N族阻挡层（6）上的钝化层（8），通过钝化层（8）形成在开口（9）中的阴极（11），由此开口（9）至少延伸到 屏障（6），和 通过钝化层（8）形成在另一个开口（10）中从而部分地延伸到阻挡层（6）中的阳极（13），阳极与屏障（6）形成肖特基接触。

公开(公告)号：EP2499669B1

公开(公告)日：2014-03-05

申请号：EP10759852.6

申请日：2010-09-21

申请人： Robert Bosch GmbH

发明人： QU, Ning ,  GOERLACH, Alfred

IPC分类号： H01L27/02 ,  H01L29/866 ,  H01L29/872

CPC分类号： H01L27/0248 ,  H01L29/866 ,  H01L29/872 ,  H01L29/8725

公开(公告)号：EP2650921A1

公开(公告)日：2013-10-16

申请号：EP13150623.0

申请日：2013-01-09

申请人： Taiwan Semiconductor Co., Ltd.

发明人： Chuang, Chih-Chiang ,  Huang, Chao-Hsin

IPC分类号： H01L29/872 ,  H01L29/06 ,  H01L29/47

CPC分类号： H01L29/0692 ,  H01L21/26586 ,  H01L29/47 ,  H01L29/8725

摘要： A semiconductor structure with dispersedly arranged active region trenches is provided. The semiconductor structure comprises a semiconductor substrate, an epitaxial layer, and an active region dielectric layer. The semiconductor substrate is doped with impurities of a first conductive type having a first impurity concentration. The epitaxial layer is doped with impurities of the first conductive type having a second impurity concentration and is formed on the semiconductor substrate. The epitaxial layer has a plurality of active region trenches and arranged in a dispersed manner. The active region dielectric layer covers a bottom and a sidewall of the active region trenches. The active region trenches have an opening in a tetragonal shape on a surface of the epitaxial layer, and the first impurity concentration is greater than the second impurity concentration.

摘要翻译： 提供具有分散布置的有源区沟槽的半导体结构。 半导体结构包括半导体衬底，外延层和有源区介电层。 半导体衬底掺杂有具有第一杂质浓度的第一导电类型的杂质。 外延层掺杂有具有第二杂质浓度的第一导电类型的杂质并形成在半导体衬底上。 外延层具有多个有源区沟槽并以分散的方式布置。 有源区介电层覆盖有源区沟槽的底部和侧壁。 有源区沟槽在外延层的表面上具有四边形形状的开口，并且第一杂质浓度大于第二杂质浓度。

公开(公告)号：EP2630663A2

公开(公告)日：2013-08-28

申请号：EP11835119.6

申请日：2011-10-20

申请人： Vishay General Semiconductor LLC

发明人： HSU, Chih-wei ,  UDREA, Florin ,  LIN, Yih-yin

IPC分类号： H01L29/872 ,  H01L29/868 ,  H01L21/329

CPC分类号： H01L29/66143 ,  H01L21/22 ,  H01L21/265 ,  H01L29/0619 ,  H01L29/872 ,  H01L29/8725

摘要： A semiconductor rectifier includes a semiconductor substrate having a first type of conductivity. A first layer, which is formed on the substrate, has the first type of conductivity and is more lightly doped than the substrate. A second layer having a second type of conductivity is formed on the substrate and a metal layer is disposed over the second layer. The second layer is lightly doped so that a Schottky contact is formed between the metal layer and the second layer. A first electrode is formed over the metal layer and a second electrode is formed on a backside of the substrate.

公开(公告)号：EP2630661A2

公开(公告)日：2013-08-28

申请号：EP11835123.8

申请日：2011-10-20

申请人： Vishay General Semiconductor LLC

发明人： HSU, Chih-Wei ,  UDREA, Florin ,  LIN, Yih-Yin

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7811 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0661 ,  H01L29/407 ,  H01L29/66143 ,  H01L29/7813 ,  H01L29/872 ,  H01L29/8725

摘要： A termination structure for a power transistor includes a semiconductor substrate having an active region and a termination region. The substrate has a first type of conductivity. A termination trench is located in the termination region and extends from a boundary of the active region to within a certain distance of an edge of the semiconductor substrate. A doped region has a second type of conductivity disposed in the substrate below the termination trench. A MOS gate is formed on a sidewall adjacent the boundary. The doped region extends from below a portion of the MOS gate spaced apart from the boundary toward a remote sidewall of the termination trench. A termination structure oxide layer is formed on the termination trench and covers a portion of the MOS gate and extends toward the edge of the substrate. A first conductive layer is formed on a backside surface of the semiconductor substrate. A second conductive layer is formed atop the active region, an exposed portion of the MOS gate, and extends to cover at least a portion of the termination structure oxide layer.

公开(公告)号：EP2600405A2

公开(公告)日：2013-06-05

申请号：EP12192190.2

申请日：2012-11-12

申请人： ROBERT BOSCH GMBH

发明人： Qu, Ning ,  Goerlach, Alfred

IPC分类号： H01L29/872

CPC分类号： H01L29/8725 ,  H01L29/47

摘要： Die Erfindung betrifft eine Schottkydiode, aufweisend ein n + -Substrat, eine n-Epischicht, in die n-Epischicht eingebrachte Gräben, an deren Seitenwänden und am gesamten Grabenboden sich floatende Schottkykontakte befinden, Mesabereiche zwischen den benachbarten Gräben und eine Metallschicht an ihrer Rückseite, wobei diese Metallschicht als Kathodenelektrode dient, und wobei eine an der Vorderseite der Schottkydiode vorgesehene Anodenelektrode zwei Metallschichten aufweist, von denen die erste Metallschicht einen Schottky-Kontakt bildet und die zweite Metallschicht unterhalb der ersten Metallschicht angeordnet ist und ebenfalls einen Schottky-Kontakt bildet. Vorzugsweise weisen diese beiden Schottky-Kontakte unterschiedliche Barrierehöhen auf.

摘要翻译： 肖特基势垒二极管具有n衬底（10）和n外延层（20）。 几个沟槽（30）被引入到外延层中。 台面（40）设置在相邻的沟槽之间。 金属膜（60）形成在二极管部分的背面（R）并用作阴极电极。 在二极管部分的正面（V）处形成用于阳极电极的上金属膜和下金属膜。 浮动肖特基触点（70）形成在沟槽的壁处并且布置在下金属膜和沟槽的底部之间。