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    METHOD AND APPARATUS FOR CONTROLLING THE COMMON MODE IMPEDANCE MISBALANCE OF AN ISOLATED SINGLE-ENDED CIRCUIT
    1.
    发明授权
    METHOD AND APPARATUS FOR CONTROLLING THE COMMON MODE IMPEDANCE MISBALANCE OF AN ISOLATED SINGLE-ENDED CIRCUIT 有权
    方法和设备中，用于隔离电路的单端的共模阻抗误差控制

    公开(公告)号：EP1175726B1

    公开(公告)日：2003-11-05

    申请号：EP00928727.7

    申请日：2000-05-02

    申请人： Medtronic Physio-Control Manufacturing Corp.

    发明人： YERKOVICH, Daniel ,  MEDEMA, Douglas, K. ,  MAKELA, Randall, J.

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45479 ,  H03F3/45991 ,  H03F2200/261

    摘要： A method and apparatus for controlling the common mode impedance misbalnce of an isolated single-ended circuit for all common mode paths, thereby allowing the balancing of the common mode impedances which reduces common mode effects while maintaining the advantages of the single-ended amplifier including circuit simplicity and the reference input connected to circuit ground. In one embodiment, two solid shields enclose the circuit as completely as possible with the inner shield connected to circuit ground which is also the reference for all other inputs to the circuit. A discrete capacitor is connected between the outer shield and each of the non-reference inputs. When the shield is complete, i.e., solid, almost solid with minimal holes or a fine mesh, the value of the discrete capacitor is selected to match the parasitic capacitance formed between the outer shield and the inner shield. In another embodiment, the shield may be incomplete, i.e., a grid, coarse mesh or a solid shield only enclosing a portion of the circuit; this shield is connected to the non-reference input of the circuit. In this case, the exposures of the incomplete outer shield and the electronic circuit ground plane (or inner shield) to an external noise source are matched to balance the effect of their parasitic capacitances. Also, in the case of an incomplete shield, a discrete capacitor may be connected between the outer shield and the non-reference input of the circuit to enable balancing the impedances to common mode currents.

    Amplifier circuit
    2.
    发明公开
    Amplifier circuit 审中-公开
    Verstärkungsschaltung

    公开(公告)号：EP1083655A2

    公开(公告)日：2001-03-14

    申请号：EP00119379.6

    申请日：2000-09-11

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Ishii, Hirotomo ,  Czarnul, Zdzislaw

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F3/45475 ,  H03F3/45659 ,  H03F3/45766 ,  H03F3/45991 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45574

    摘要： A balanced type DDA 1 is combined with a single end type DDA 2 to form a differential amplifier circuit 3 which is a balanced type DDA- The balanced type DDA 1 has four input terminals VPP, VPN, VNN and VNP which are input terminals of two differential input stages, and two output terminals VoutP and VoutN which are output terminals of two output stages. These terminals are four input terminals and two output terminals of the differential amplifier circuit 3. The single end type DDA 2 has four input terminals, which are input terminals of two differential input stages and which are connected to the four input terminals of the differential amplifier circuit 3, respectively. The single end type DDA 2 also has an output terminal vout of one output stage, which serves as a control output terminal for the feedback control of the differential amplifier circuit 3. By the negative feedback of the signal of the control output terminal Vout, a virtual short-circuit can be established between two input terminals of each differential input stages, so that it is possible to reduce distortion without reducing gains.

    摘要翻译： 平衡型DDA 1与单端DDA2组合形成平衡型DDA的差分放大电路3。平衡型DDA 1具有四个输入端子VPP，VPN，VNN和VNP，输入端为二 差分输入级，以及作为两个输出级的输出端子的两个输出端子VoutP和VoutN。 这些端子是差分放大器电路3的四个输入端子和两个输出端子。单端型DDA2具有四个输入端子，它们是两个差分输入级的输入端子，它们连接到差分放大器的四个输入端子 电路3。 单端型DDA2还具有一个输出级的输出端子vout，其作为用于差分放大器电路3的反馈控制的控制输出端子。通过控制输出端子Vout的信号的负反馈，a 可以在每个差分输入级的两个输入端之间建立虚拟短路，使得可以在不减少增益的情况下减少失真。

    Narrow band electroencephalographic amplifier
    3.
    发明公开
    Narrow band electroencephalographic amplifier 失效
    SchmalbandverstärkerfürEnzephalografie。

    公开(公告)号：EP0199219A2

    公开(公告)日：1986-10-29

    申请号：EP86104991.4

    申请日：1986-04-11

    申请人： WESTINGHOUSE ELECTRIC CORPORATION

    发明人： Sherwin, Gary William ,  Zomp, John Michael

    IPC分类号： A61B5/04 ,  H03F3/195 ,  H03F1/48

    CPC分类号： H03F3/195 ,  H03F3/45475 ,  H03F3/45991 ,  H03F2203/45552 ,  H03F2203/45568

    摘要： A low-noise, high gain differential amplifier suitable for EEG amplification is constructed in a shielded metal enclosure. preferably on a ground plane circuit board. The amplifier is battery powered to eliminate all possibility of noise from the power system. The amplifier utilizes a pair of operational amplifiers to provide high input impedence for each of two input signals. A differential amplifier generates an internal signal which is filtered and amplified by a pair of band-pass amplifiers and overlapping low-pass and high-pass amplifiers.

    摘要翻译： 适用于EEG放大的低噪声，高增益差分放大器构造在屏蔽金属外壳中，最好在接地平面电路板上。 放大器是电池供电的，以消除电力系统的所有可能的噪音。 放大器利用一对运算放大器为两个输入信号中的每一个提供高输入阻抗。 差分放大器产生一个内部信号，由一对带通放大器和重叠的低通和高通放大器滤波和放大。

    Verstärkerschaltung mit einer symmetrisch aufgebauten Eingangsstufe
    4.
    发明公开
    Verstärkerschaltung mit einer symmetrisch aufgebauten Eingangsstufe 失效
    Verstärkerschaltungmit einer symmetricrisch aufgebauten Eingangsstufe。

    公开(公告)号：EP0080242A1

    公开(公告)日：1983-06-01

    申请号：EP82201475.9

    申请日：1982-11-19

    申请人： Philips Patentverwaltung GmbH ,  Philips Electronics N.V.

    发明人： Gottlieb, Detlef

    IPC分类号： H03F3/45 ,  H01L27/08

    CPC分类号： H03F3/45991 ,  H01L27/0825 ,  H03F3/45085 ,  H03F3/4517 ,  H03F3/45618 ,  H03F2203/45596 ,  H03F2203/45702

    摘要： Bei Verstärkern mit symmetrisch aufgebauter Differenzverstärker-Eingangsstufe kann durch einen Ruhestrom über einen mit einem der beiden Eingänge verbundenen Vorwiderstand (8) ein Eingangsspannungs-Offset auftreten. Dieser Eingangsspannungs-Offset kann, insbesondere bei integrierten Schaltungen, dadurch verringert bzw. kompensiert werden, daß ein Transistor des Zweiges der Differenzverstärker-Eingangsstufe, mit dem der Vorwiderstand verbunden ist, eine größere Emitterfläche erhält als der entsprechende Transistor des anderen Zweiges.

    摘要翻译： 在具有平衡差分放大器输入级的放大器中，通过连接到两个输入之一的偏置电阻（8）的静态电流可以产生输入电压偏移。 可以减小或补偿该输入电压偏移，特别是在集成电路中，为了提供偏置电阻器所连接的差分放大器输入级的支路的晶体管，具有比另一个分支的相应晶体管更大的发射极面积 。

    RECEIVER FOR A DIFFERENTIAL DATA BUS
    6.
    发明授权
    RECEIVER FOR A DIFFERENTIAL DATA BUS 有权
    接收器差分总线

    公开(公告)号：EP1766908B1

    公开(公告)日：2008-04-16

    申请号：EP05772293.6

    申请日：2005-06-30

    申请人： Koninklijke Philips Electronics N.V.

    发明人： WOLTHEK, Jelle Nico ,  WAARDENBURG, Cornelis Klaas ,  KWAKERNAAT, Cecilius Gerardus ,  BUTSELAAR, Stefan Gerhard Erich

    IPC分类号： H04L25/02 ,  H03F3/45

    CPC分类号： H04L25/0296 ,  H03F3/45991 ,  H03F2203/45538 ,  H03F2203/45588 ,  H03F2203/45616 ,  H04L25/0274

    摘要： The invention relates to a receiver for a differential bus with a switch control logic (151), with two branches with resistive elements (7, 61...70, 8 and 5, 11...20, 6) and with switches (3, 80) for switching the resistive elements, in which the switch control logic sets the switches - in a first routine for determining the absolute level of signals on the bus by applying a common mode voltage to the bus, by comparing the voltage on a first resistive branch with a reference voltage, by selecting the correct switch settings, and by writing these settings to an internal storage device, - and in a second routine for minimizing the mismatch between the two resistive branches by applying a common mode voltage to the bus, by comparing the voltage of the second resistive branch with that of the already trimmed first resistive branch, by selecting the correct switch settings for the second branch, and by writing these settings to an internal storage device. The receiver therefore provides good balancing and common mode rejection.

    BALANCED TRANSCONDUCTOR AND ELECTRONIC DEVICE
    8.
    发明公开
    BALANCED TRANSCONDUCTOR AND ELECTRONIC DEVICE 审中-公开
    平衡和电子设备跨

    公开(公告)号：EP1442519A1

    公开(公告)日：2004-08-04

    申请号：EP02802335.6

    申请日：2002-09-20

    申请人： Koninklijke Philips Electronics N.V.

    发明人： HUGHES, John , B.

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45991 ,  H03F3/45959 ,  H03F2200/294 ,  H03F2200/372 ,  H03H11/045 ,  H03H2011/0494

    摘要： A balanced transconductor having a pair of voltage inputs and a pair of current outputs comprises a pair of single-ended transconductors, one in each signal path and a cancellation network. The cancellation network cancels at the inputs to the single-ended transconductors a common mode voltage appearing at the voltage inputs so that no common mode output current results. The cancellation network may comprise four half-size single-ended transconductors drawing half the supply current of full-size single-ended transconductors.

    Verstärkeranordnung mit Störsignalunterdrückung
    9.
    发明公开
    Verstärkeranordnung mit Störsignalunterdrückung 失效
    与噪声抑制放大器装置。

    公开(公告)号：EP0007074A1

    公开(公告)日：1980-01-23

    申请号：EP79102297.3

    申请日：1979-07-05

    申请人： Hellige GmbH

    发明人： Weber, Horst

    IPC分类号： H03F3/45 ,  A61B5/04

    CPC分类号： H03F3/45475 ,  H03F3/45928 ,  H03F3/45991

    摘要： Zur Gleichtaktunterdrückung bei einer vorzugsweise mit einer Mehrzahl von Operationsverstärkern (V 1 , V 2 , ... Vn) bestückten Verstärkeranordnung für eine Mehrzahl von zu verarbeitenden Nutzsignalen (E,, E2, ... En), die durch ein größeres Störsignal überlagert sind, ist vorgesehen, die Nutzsignale, beispielsweise physiologische Meßsignale bei EEG-und EKG-Messungen, an positiven Eingängen (+) der Einzelverstärker zuzuführen, während die negativen Eingängen (-) jeweils an den Verbindungspunkt eines aus zwei Widerständen bestehenden Spannungsteilers (R 1 , R 2 ) angeschlossen sind, der jeweils zwischen dem jeweiligen Verstärkerausgang und einem Potential-Bezugspunkt (P) liegt. Dieses Bezugspotential wird durch den Ausgang eines weiteren Operationsverstärkers (V 1 ) festgelegt, an dessen positivem Eingang ein durch das Störsignal überlagertes Bezugsnutzsignal (U E4 ) zugeführt wird, während sein negativer Eingang am Verbindungspunkt eines aus zwei Widerständen bestehenden Spannungsteilers (R 2 ', R,') angeschlossen ist, der zwischen dem Ausgang dieses weiteren Operationsverstärkers und dem Potential-Bezugspunkt (P) liegt. Bei Meßsignalverstärkern, z.B für physiologische Meßsignale, erfolgt damit die Gleichtaktunterdrückung bereits in den Vorverstärkerstufen, so daß separate Differenzstufen zur Störsignalunterdrückung eingespart werden können.

    摘要翻译： 在一个优选配备用于共模抑制与多个运算放大器（V1，V2，... Vn的）用于将多个经处理的信息信号的放大器装置（E1 E2，...恩），这是由一个较大的干扰信号叠加的，并且提供 供给有用信号，例如在EEG和ECG测量生理测量信号，给各个放大器的正输入端（+），而负输入端（ - ）分别为双电阻分压器（R1，R2）的接合处被连接，所述 在每个放大器输出与电势参考点（P）之间的每一种情况下。 该参考电位由进一步运算放大器的输出（V4），一个由干扰信号Bezugsnutzsignal到正输入（UE4）重叠，而其负输入到两电阻分压器（R2”，R1' ）的连接点连接的馈送确定 的所述另一运算放大器和电势基准点（P）位于所述输出之间。 在Meßsignalverstärkern，e.g用于生理测量信号，从而使共模抑制，早在前置放大器时，使得单独的差分级可以保存的噪声抑制。