公开(公告)号：EP2991230A1

公开(公告)日：2016-03-02

申请号：EP15158250.9

申请日：2015-03-09

Applicant: MediaTek, Inc

Inventor： Hung, Li-Han ,  Huang, Yen-Chuan ,  Wang, Chi-Yun ,  Lou, Chih-Hong

IPC: H03M3/00 ,  H03H11/12

CPC classification number: H03M3/354 ,  H03H11/1252 ,  H03M3/404 ,  H03M3/438

Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the STF of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.

Abstract translation: 信号调制装置包括：积分电路，被配置为根据缩放的模拟信号和第一反馈信号产生积分信号; 谐振电路，被布置成根据积分信号产生谐振信号; 布置成将所述谐振信号转换为数字输出信号的第一信号转换电路; 第二信号转换电路，被布置成将数字输出信号转换成第一反馈信号; 以及第一阻抗电路，其具有接收模拟信号的第一端子和耦合到所述谐振电路的第二端子，用于改变所述前向路径传递函数中的零点的位置，并因此整形所述信号调制装置的STF; 以及第二阻抗电路，其具有接收模拟信号的第一端子和耦合到积分电路的第二端子，用于产生缩放的模拟信号。

公开(公告)号：EP1844552A1

公开(公告)日：2007-10-17

申请号：EP05819362.4

申请日：2005-12-13

Applicant: ROBERT BOSCH GMBH

Inventor： WILLIG, Rainer ,  KUHLMANN, Burkhard ,  GOMEZ, Udo-Martin ,  BAUER, Wolfram ,  NEUL, Reinhard ,  LANG, Christoph ,  VEITH, Michael

IPC: H03M3/04

CPC classification number: H03M3/404 ,  H03M3/424 ,  H03M3/464

Abstract: The invention relates to a delta sigma modulator comprising an oscillatable system which is provided with a characteristic frequency (fR), an electronics unit and a regulation loop which acts the oscillatable system upon the electronics unit and vice versa. Said invention is characterised in that the regulation loop is embodied in such a way that an amplification in said regulation loop displays an amplification superelevation in a frequency range around the characteristic frequency (fR) of the oscillable system.

公开(公告)号：EP1055283A2

公开(公告)日：2000-11-29

申请号：EP99964590.6

申请日：1999-12-13

Applicant: Koninklijke Philips Electronics N.V.

Inventor： MINNIS, Brian, J. ,  PHILIPPE, Pascal

IPC: H03C1/00

CPC classification number: H04L27/2017 ,  H03C3/0975 ,  H03C2200/0058 ,  H03L7/185 ,  H03M3/40 ,  H03M3/404 ,  H03M3/43 ,  H03M3/452

Abstract: A transmitter (10) comprises a phase modulator (12) and a phase locked loop (PLL)(14) having a relatively high powered voltage controlled oscillator (VCO)(16). The PLL (14) includes a phase sensitive detector (30) for comparing a phase comparison frequency derived from the VCO output with a phase modulated IF carrier derived from the phase modulator. The phase modulator (12) comprises a reference frequency source (42), means (44) for deriving four quadrature phase components of the reference frequency produced by said source and phase selection means (46) controlled by complex modulation means (50, 52) for deriving the phase modulated IF carrier by random interpolation between the four quadrature components.

Abstract translation: 发射机（10）包括相位调制器（12）和具有相对高功率的压控振荡器（VCO）（16）的锁相环（PLL）（14）。 PLL（14）包括相敏检测器（30），用于比较从VCO输出导出的相位比较频率与从相位调制器导出的相位调制IF载波。 相位调制器（12）包括一个基准频率源（42），用于导出由所述源产生的参考频率的四个正交相位分量的装置（44）和由复数调制装置（50,52）控制的相位选择装置（46） 用于通过四个正交分量之间的随机插值来导出相位调制IF载波。

公开(公告)号：EP2273682A4

公开(公告)日：2011-10-26

申请号：EP09738590

申请日：2009-03-16

Applicant: PANASONIC CORP

Inventor： DOSHO SHIRO ,  MORIE TAKASHI ,  MATSUKAWA KAZUO ,  MITANI YOSUKE ,  TAKAYAMA MASAO

IPC: H03M3/02 ,  H03H7/06 ,  H03H11/04

CPC classification number: H03M3/454 ,  H03M3/404 ,  H03M3/43

公开(公告)号：EP2119005A1

公开(公告)日：2009-11-18

申请号：EP07858356.4

申请日：2007-12-19

Applicant: Nokia Corporation

Inventor： KOLI, Kimmo

IPC: H03H2/00 ,  H03H19/00 ,  H04B1/00 ,  H04B1/18 ,  H04B1/26

CPC classification number: H03H15/00 ,  H03H19/008 ,  H03M3/40 ,  H03M3/404 ,  H03M3/438 ,  H04B1/18

Abstract: An apparatus, having as an input an analog signal, is provided. The apparatus comprises a first circuit comprising an impedance transferring circuit configured to band pass filter the input signal, obtaining a filtered signal; the impedance transferring circuit comprising: a transconductance amplifier (1102), and a switching arrangement (1106, 1108) and an impedance circuit (404) connected in series, the switching arrangement being configured to switch the impedance of the impedance circuit of the impedance transferring circuit from base band to the frequency of the input signal. The apparatus further comprises a second circuit (1112) configured to perform down mixing to the filtered signal obtaining a base band signal and a feedback loop connecting the base band signal to the switching arrangement (1114, 1116) and the impedance circuit, the signal of the feedback loop configured to control the properties of the first circuit.

公开(公告)号：EP1454416B1

公开(公告)日：2006-06-14

申请号：EP02786344.8

申请日：2002-11-13

Applicant: NATIONAL UNIVERSITY OF SINGAPORE

Inventor： XU, Yong Ping ,  SUN, Wai Hoong ,  WANG, Xiaofeng ,  WANG, Zhe ,  LIW, Sean Ian Saxon

IPC: H03M7/12 ,  H03H9/64 ,  H03M3/00

CPC classification number: H03M3/404 ,  H03H7/01 ,  H03M3/344 ,  H03M3/348

Abstract: A bandpass sigma-delta modulator using acoustic resonators or micro-mechanical resonators. In order to improve resolution at high frequencies, acoustic resonators. In order to improve resolution at high frequencies, acoustic resonators or micro-mechanical resonators are utilized in a sigma-delta modulator instead of electronic resonators. The quantized output is fed back using a pair of D/A converters to an input summation device. In fourth order devices, the feed back is to two summation devices in series. Such a sigma-delta modulator is usable in a software defined radio cellular telephone system and in other applications where high-frequency and high-resolution A/D conversion is required. A cancellation circuit may remove the anti-resonance signal from a resonator. An anti-resonance cancellation circuit removes the anti-resonance from the output of the resonators by providing a signal which is subtracted from the output of the resonator. The cancellation circuit includes a capacitor which is matched to the static capacitance of the resonator. The loads of the resonator and cancellation network are also matched.

公开(公告)号：EP0643488A1

公开(公告)日：1995-03-15

申请号：EP94305610.1

申请日：1994-07-28

Applicant: Martin Marietta Corporation

Inventor： Pellon, Leopold Ernest

IPC: H03M3/00

CPC classification number: H03M3/404 ,  H03M3/424 ,  H03M3/452

Abstract: A sigma-delta (ΣΔ) analog-to-digital converter (ADC) (700) accepts band-limited analog signals (51), and subtracts an analog replica of an output pulse- or amplitude- density modulated (ADM) signal therefrom to produce an error signal. The error signal is processed by an analog filter or resonator (758) with a nondelayed forward path (763) and a tapped nonaccumulating delay line (775), and summed feedback (762) and feedforward (764) weights coupled to the taps, to thereby produce a resonated signal (208). An ADC (210) processes the resonated signal, and produces the ADM signal. The ADC undesirably produces quantization noise. A digital-to-analog converter (DAC) (218) noiselessly converts the PDM signal into the analog replica (206), to aid in forming the error signal. In a particular embodiment of the invention, the resonator (758) includes a recursive analog transversal filter with delays and linear weighting elements for linearity and high operating speed. The ADC (700) may be in a high-speed system such as a radar.

Abstract translation: 所述Σ-Δ（〜E〜D）模拟到数字转换器（ADC）接受频带受限模拟信号，并减去到调制（ADM）信号从那里上产生错误的输出脉冲振幅或密度的类似物复制品 信号。 该误差信号是通过在模拟滤波器或谐振器处理与未延迟的前向路径和抽头延迟线非累积，并求和反馈以及耦合到抽头的前馈的权重，从而产生谐振信号。 一个ADC处理该谐振信号，并产生ADM信号。 该ADC不希望可生产量化噪声。 一种数字 - 模拟转换器（DAC）PDM信号转换无声成模拟副本，在形成所述误差信号，以帮助。 谐振器可以包括与延迟和线性度和高工作速度的线性加权元件的递归横向模拟滤波器。

公开(公告)号：EP3276833A1

公开(公告)日：2018-01-31

申请号：EP17180146.7

申请日：2017-07-06

Applicant: Commissariat à l'Energie Atomique et aux Energies Alternatives

Inventor： VERDANT, Arnaud ,  GUICQUERO, William

IPC: H03M3/00

CPC classification number: H03M3/436 ,  H03M3/358 ,  H03M3/39 ,  H03M3/404 ,  H03M3/412 ,  H03M3/458

Abstract: L'invention concerne un convertisseur sigma-delta comportant un modulateur sigma-delta comportant au moins un filtre analogique adapté, à chaque cycle d'une phase de conversion, à recevoir un signal analogique interne issu du signal analogique d'entrée et à fournir une valeur analogique de sortie, dans lequel : la contribution du signal analogique interne à la valeur de sortie du filtre est plus faible à un cycle (k) donné de la phase de conversion qu'à un cycle précédent (k-1), les contributions aux différents cycles étant régies par une première loi (f(k)) prédéterminée fonction du rang (k) du cycle ; et la durée d'un cycle (k) donné de la phase de conversion est inférieure à la durée d'un cycle précédent (k-1), les durées des différents cycles étant régies par une deuxième loi (Tc(k)) prédéterminée fonction du rang (k) du cycle dans la phase de conversion.

Abstract translation: 本发明涉及一种西格玛 - 德尔塔转换器，包括具有至少一个模拟匹配滤波器的Σ-Δ调制器，用于转换级的每个周期中，从模拟输入信号接收的内部模拟信号并提供 模拟输出值，其特征在于：输入到滤波器输出值的内部的模拟信号是在先前周期提供给转换阶段低于一个周期（k）的（K-1）中，捐款 不同的周期由根据周期的等级（k）预先确定的第一定律（f（k））控制; 并提供给所述转换相的周期（k）的持续时间小于前一个周期（K-1），不同的周期的持续时间由第二法管辖的持续时间（TC（k））的预定 在转换阶段中周期的秩（k）的函数。

公开(公告)号：EP1844552B1

公开(公告)日：2009-06-10

申请号：EP05819362.4

申请日：2005-12-13

Applicant: ROBERT BOSCH GMBH

Inventor： WILLIG, Rainer ,  KUHLMANN, Burkhard ,  GOMEZ, Udo-Martin ,  BAUER, Wolfram ,  NEUL, Reinhard ,  LANG, Christoph ,  VEITH, Michael

IPC: H03M3/04

CPC classification number: H03M3/404 ,  H03M3/424 ,  H03M3/464

Abstract: The invention relates to a delta sigma modulator comprising an oscillatable system which is provided with a characteristic frequency (f R ), an electronics unit and a regulation loop which acts the oscillatable system upon the electronics unit and vice versa. Said invention is characterised in that the regulation loop is embodied in such a way that an amplification in said regulation loop displays an amplification superelevation in a frequency range around the characteristic frequency (f R ) of the oscillable system.

公开(公告)号：EP1911158A1

公开(公告)日：2008-04-16

申请号：EP05766729.7

申请日：2005-07-20

Applicant: The National University of Singapore

Inventor： YU, Rui ,  XU, Yong Ping Signal Processing & VLSI Desing Lab.

IPC: H03H9/64 ,  H03H9/46 ,  H03M3/02 ,  H04B14/06

CPC classification number: H03H9/46 ,  H03M3/322 ,  H03M3/404 ,  H03M3/458 ,  H04B14/06

Abstract: Briefly, in accordance with one embodiment of the invention, a resonator (110) such as an electromechanical resonator may be coupled with a cancellation network (112) to reduce and/or cancel an anti-resonance effect in the resonator (110), which may be due to, for example, a static capacitance (210) inherent in the resonator. Cancellation of an anti resonance effect from the resonator response may allow a resonance effect of the resonator (110) to be a predominant effect to allow the resonator (110) to be utilized as a bandpass filter having a relatively higher Q, for example in a bandpass sigma-delta modulator (526) that may be utilized in a digital RF receiver (800).