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公开(公告)号:EP1751853A1
公开(公告)日:2007-02-14
申请号:EP05748731.6
申请日:2005-05-12
发明人: MANKU, Tajinder
CPC分类号: H03K5/1252 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03F1/3211 , H03F1/3223 , H03F3/24 , H03F3/45183 , H03F2200/372 , H03F2200/87 , H03F2203/45318 , H03F2203/45366 , H03F2203/45498 , H03F2203/45544 , H03K5/02 , H04B1/0475 , H04B1/123 , H04B2001/0441
摘要: A CMOS transconductor for cancelling third-order intermodulation is provided. The transconductor includes a transconductance circuit and a tuneable distortion circuit. The transconductance circuit takes an input voltage and generates an output current having a transconductance element and an IM3 element. The distortion circuit takes the same input voltage and generates a current having an IM3 element of equal amplitude and opposite phase to the IM3 element of the transconductance circuit. A controller circuit tunes the distortion circuit to adjust its IM3 element to substantially equal the amplitude of the IM3 of the transconductance circuit. The distortion and transconductance circuits are arranged to sum their output currents thereby effectively cancelling the IM3 elements, leaving the transconductance relatively unmodified.
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公开(公告)号:EP0733281B1
公开(公告)日:2001-06-13
申请号:EP95929991.8
申请日:1995-09-21
CPC分类号: H03F1/3217
摘要: An amplifier arrangement having a first and a second output transistor (T1, T2), which are drain-connected to the output terminal is provided with a driver stage (100), said driver stage (100) preventing the output transistors (T1, T2) from becoming non-conductive, thereby reducing cross-over distortion. This is achieved by applying an input signal via the sources of a source coupled transistor pair (T3, T4) to the gates of the output transistors (T1, T2) and providing additional source followers (T5, T6) for defining gate-sources voltages which prevent the output transistors from becoming non-conductive.
摘要翻译: 具有漏极连接到输出端的第一和第二输出晶体管(T1,T2)的放大器装置设置有驱动器级(100),所述驱动器级(100)防止输出晶体管(T1,T2 )变得不导电,从而减少了交叉失真。 这是通过经由源极耦合晶体管对(T 3,T 4)的源极将输入信号施加到输出晶体管(T 1,T 2)的栅极并且提供额外的源极跟随器(T 5,T 6)以用于定义栅源电压 这防止了输出晶体管变得不导电。
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公开(公告)号:EP0037406A4
公开(公告)日:1982-02-05
申请号:EP80901914
申请日:1981-04-08
申请人: AMERICAN MICRO SYST
发明人: HAQUE YUSUF AMINUL
CPC分类号: H03F3/45179 , H03F3/3001 , H03F3/3008 , H03F3/3025 , H03F3/45183 , H03F2203/30018 , H03F2203/30033 , H03F2203/30036 , H03F2203/45188 , H03F2203/45224 , H03F2203/45508 , H03F2203/45674 , H03F2203/45692
摘要: Operational amplifier (10) comprised of MOSFET elements which provides for a variable drive for an output stage (18) that results in lower power dissipation and increased gain factor over comparable circuits using constant bias drive for the output stage. A bias section (14) comprised of complementary MOS elements (24, 26) is connected to a single MOSFET (40) that furnishes constant current to the signal input section of a differential amplifier section (20). The output of this differential amplifier is furnished by one path directly to one complementary MOSFET element (72) of a high impedance output stage and by another path to a level shift section (16) which provides an output to a second complementary MOSFET element (80) of the output stage. Thus, the circuit functions under class A-B operation at low power dissipation and provides high open loop gain. Additional embodiments of the invention utilize three MOSFET elements (104, 106, 108) in the level shift section or an additional output stage having an NPN transistor (120) in combination with an N channel MOSFET (122).
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公开(公告)号:EP1088391A1
公开(公告)日:2001-04-04
申请号:EP00928172.6
申请日:2000-04-14
申请人: That Corporation
发明人: FLORU, Fred
IPC分类号: H03F3/18
CPC分类号: H03F3/3076 , H03F3/3071
摘要: The present invention is directed to a buffer stage for buffering and isolating a signal source from an external load. The stage has a signal input terminal for receiving an input signal from said signal source and a signal output terminal for providing an output signal (OUTPUT), corresponding to said input signal (INPUT), to said external load. The stage comprises: an input section (102) including at least two driver transistors (Q3 and Q4) each arranged so as to operate with a predetermined bias current; an output section (106) including at least two output transistors (Q1 and Q2) each arranged so as to operate with a predetermined quiescent current a voltage source, coupled to the input and output sections and constructed and arranged so as to set the quiescent currents flowing through the output transistors (Q1 and Q2) substantially independent of the size of the bias current flowing through the driver transistors (Q3 and Q4).
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公开(公告)号:EP0469143B1
公开(公告)日:1997-10-01
申请号:EP91905922.0
申请日:1991-02-11
发明人: LITTLE, Frank , KRUSE, Herman, A. , MEGNA, John
CPC分类号: H04B10/6911 , H03F3/082 , H03F3/265 , H04B10/69 , H04B10/6973
摘要: A receiver is described for optical signals which are amplitude modulated with broadband radio frequency signals. The receiver includes an optical detector (20) which receives the incoming optical signal and generates a radio frequency electrical signal which varies with the power level of the incoming optical signal. This electrical signal is applied to a pair of amplifiers (100, 200) which are connected in a push-pull relationship. In a preferred embodiment, a tuning network (500) is connected between the two amplifiers for optimizing the amplification of a selected band of radio frequencies.
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公开(公告)号:EP4409742A1
公开(公告)日:2024-08-07
申请号:EP22873765.6
申请日:2022-08-31
发明人: NGUYEN, Duy , MORONEY, Ray , D'AGOSTINO, Stefano , PHAN, Trong
CPC分类号: H03F3/45085 , H03F1/302 , H03F2200/44720130101 , H03F3/19 , H03F2200/45120130101
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公开(公告)号:EP1088391A4
公开(公告)日:2004-11-24
申请号:EP00928172
申请日:2000-04-14
申请人: THAT CORP
发明人: FLORU FRED
CPC分类号: H03F3/3076 , H03F3/3071
摘要: The present invention is directed to a buffer stage for buffering and isolating a signal source from an external load. The stage has a signal input terminal for receiving an input signal from said signal source and a signal output terminal for providing an output signal (OUTPUT), corresponding to said input signal (INPUT), to said external load. The stage comprises: an input section (102) including at least two driver transistors (Q3 and Q4) each arranged so as to operate with a predetermined bias current; an output section (106) including at least two output transistors (Q1 and Q2) each arranged so as to operate with a predetermined quiescent current a voltage source, coupled to the input and output sections and constructed and arranged so as to set the quiescent currents flowing through the output transistors (Q1 and Q2) substantially independent of the size of the bias current flowing through the driver transistors (Q3 and Q4).
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公开(公告)号:EP0327577A4
公开(公告)日:1989-09-19
申请号:EP87907375
申请日:1987-10-09
发明人: COX MASON FORREST
CPC分类号: H03F3/2171 , H03F1/0244 , H03F3/45475 , H03F3/45973
摘要: A voltage amplifier (30) for amplifying an input voltage signal (140). The amplifier includes a string of MOSFET circuits (200) coupled between a voltage-to-current converter and a high voltage power supply terminal. The string of MOSFET circuits may be expanded to achieve linear voltage amplification over a wide range.
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公开(公告)号:EP0037818A4
公开(公告)日:1982-09-10
申请号:EP80901869
申请日:1981-04-08
申请人: MOTOROLA INC
IPC分类号: H01L27/04 , G05F1/56 , G05F3/20 , G05F3/22 , G05F3/26 , H01L21/822 , H01L27/02 , H01L29/735 , H02J1/04 , H03F3/18
CPC分类号: G05F3/265 , H01L27/0229 , H01L29/735
摘要: A current source (30) which provides multiple output currents having magnitudes which are of a predetermined ratio of the magnitude of an input current supplied to the current source. The current source includes an input transistor (14) and at least two output transistors (12, 16). The emitters and bases of the input and two output transistors are connected in common with the emitters thereof being connected to a terminal (18) at which is supplied a source of operating potential. The collectors are respectively coupled to individual utilization means. First and second additional transistors (32, 34) are provided having symmetrical structures with the bases thereof being connected to the bases of the output transistors and their emitters connected to the collector of the first output transistor (16). The collectors of the two output transistors are connected respectively to the collector of the input transistor and the collector of the second output transistor (12) whereby all of any saturation current produced by the first output transistor becoming saturated is equally conducted between the two additional transistors to maintain the ratio of input and output currents.
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