Light detecting device
    32.
    发明专利

    公开(公告)号:JP4390881B2

    公开(公告)日:2009-12-24

    申请号:JP34310398

    申请日:1998-12-02

    发明人: 誠一郎 水野

    摘要: An integrator circuit (10) receiving a current signal from the anode terminal of a photodiode (PD) includes a two-input, two-output fall-differential amplifier (A0), capacitors (C01, C02), switches (S01, S02, S11, S12), and an additional capacitor (Ca). The capacitor (C01) and the switch (S01) are connected in parallel between the negative and positive input terminals of the full-differential amplifier (A0). The negative input terminal of the full-differential amplifier (A0) is connected with the anode terminal of the photodiode (PD). The capacitor (C02) and the switch (S02) are connected in parallel between the positive and negative input terminals of the full-differential amplifier (A0). The positive input terminal of the full-differential amplifier (A0) is connected with the additional capacitor (Ca) whose capacitance is substantially equal to the junction capacitance of the photodiode (PD).

    Output buffer with improved output deviation and source driver for flat panel display having the output buffer
    36.
    发明专利
    Output buffer with improved output deviation and source driver for flat panel display having the output buffer 有权
    具有改进的输出缓冲器的输出缓冲器和用于具有输出缓冲器的平板显示器的源驱动器

    公开(公告)号:JP2007189699A

    公开(公告)日:2007-07-26

    申请号:JP2007004775

    申请日:2007-01-12

    摘要: PROBLEM TO BE SOLVED: To provide an output buffer with improved output deviation and a source driver for flat panel display having the same.
    SOLUTION: The present invention relates to an output buffer including a first input terminal to which a first differential input signal is applied, a second input terminal to which a second differential input signal is applied, an output terminal that generates an output signal based on the second differential input signal as the first input signal, a first power supply terminal to which a first power supply voltage is applied, a second power supply terminal to which a second power supply voltage is applied, and an amplification unit that amplifies a difference between the first differential input signal and the second differential input signal, pulls up the output signal to the first power supply voltage or pulls down the output signal to the second power supply voltage, and includes a plurality of transistors.
    COPYRIGHT: (C)2007,JPO&INPIT

    摘要翻译: 要解决的问题:提供具有改进的输出偏差的输出缓冲器和具有其的平板显示器的源极驱动器。 解决方案:本发明涉及一种输出缓冲器,包括施加第一差分输入信号的第一输入端子,施加第二差分输入信号的第二输入端子,产生输出信号的输出端子 基于作为第一输入信号的第二差分输入信号,施加第一电源电压的第一电源端子,施加第二电源电压的第二电源端子,以及放大单元 第一差分输入信号和第二差分输入信号之间的差异将输出信号拉至第一电源电压或将输出信号拉低至第二电源电压,并且包括多个晶体管。 版权所有(C)2007,JPO&INPIT

    Power amplifier circuit
    40.
    发明专利
    Power amplifier circuit 失效
    功率放大器电路

    公开(公告)号:JPS6152011A

    公开(公告)日:1986-03-14

    申请号:JP17250284

    申请日:1984-08-21

    发明人: AKAO YOSHIAKI

    CPC分类号: H03F3/3001

    摘要: PURPOSE:To improve the symmetry of an amplifier circuit and to prevent power noise from appearing at an output waveform by providing a transistor (TR) of a different conduction form respectively to a positive half cycle and a negative half cycle. CONSTITUTION:When a positive signal is fed to an input terminal (2), the 1st TRQ1 of N-channel is turned on. As a result, the 4th TRQ4 of P-channel is turned on. Then a closed circuit comprising a power supply 1, the TRQ1 a load 6 and the 4th TRQ4. The 2nd TRQ2 and the 3rd TRQ3 are turned on during the period when a negative signal is fed to the input terminal 2 with the same principles of operation, and when the characteristics are arranged, the balancing state is improved. Even if a noise is included in the voltage of the power supply 1, the 1st and 4th TRQ1, Q4 are in operation and the noise is a positive noise, then the 1st TRQ1 of N-channel acts like increasing the current more and the 4th TRQ4 of P-channel acts like decreasing the current. As a result, no power supply noise appears at the output.

    摘要翻译: 目的:通过将不同导通形式的晶体管(TR)分别提供到正半周期和负半周期,以提高放大器电路的对称性并防止功率噪声出现在输出波形处。 构成:当正信号馈送到输入端(2)时,N通道的第1个TRQ1导通。 结果,P通道的第四个TRQ4被打开。 然后闭合电路,其包括电源1,TRQ1,负载6和第四TRQ4。 第二TRQ2和第三TRQ3在负信号以相同的操作原理馈送到输入端2的时段期间导通,并且当布置特性时,平衡状态得到改善。 即使在电源1的电压中包含噪声,第一和第四TRQ1,Q4都在工作,噪声是正的噪声,则N通道的第一个TRQ1的作用就像增加电流一样多,而第四个 P通道的TRQ4类似于降低电流。 因此,输出端不会出现电源噪声。