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公开(公告)号：US08832507B2
公开(公告)日：2014-09-09
申请号：US12861718
申请日：2010-08-23
申请人： Daniel J. Post , Hsiao Thio
发明人： Daniel J. Post , Hsiao Thio
CPC分类号： G06F11/1048 , G06F12/0246 , G06F2212/7208 , G11C29/82 , G11C29/883 , G11C2029/0411 , H03M13/09 , H03M13/1515 , H03M13/152
摘要： Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block.
摘要翻译： 公开了用于从非易失性存储器（“NVM”）的一个或多个生长的坏块生成动态超级块的系统和方法。 在一些实施例中，动态超级块可以通过将来自NVM的一个或多个管芯的生长的坏块的存储器位置的子集拼接在一起而形成。 可以基于存储器位置的子集的至少一个可靠性测量来选择存储器位置的子集。 在一些实施例中，响应于检测动态超级块的一部分中的一个或多个访问失败，NVM接口可以使动态超级块的至少一部分退役。 在一些实施例中，NVM接口可以通过逐渐增加新的动态超级块的大小从动态超级块重建新的动态超级块。
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公开(公告)号：US20110173462A1
公开(公告)日：2011-07-14
申请号：US12843419
申请日：2010-07-26
申请人： Nir J. Wakrat , Daniel J. Post , Kenneth Herman , Vadim Khmelnitsky , Nick Seroff , Hsiao Thio , Matthew Byom
发明人： Nir J. Wakrat , Daniel J. Post , Kenneth Herman , Vadim Khmelnitsky , Nick Seroff , Hsiao Thio , Matthew Byom
IPC分类号： G06F1/00
CPC分类号： G11C16/30 , G06F1/26 , G06F1/3203
摘要： Systems and methods are disclosed for managing the peak power consumption of a system, such as a non-volatile memory system (e.g., flash memory system). The system can include multiple subsystems and a controller for controlling the subsystems. Each subsystem may have a current profile that is peaky. Thus, the controller may control the peak power of the system by, for example, limiting the number of subsystems that can perform power-intensive operations at the same time or by aiding a subsystem in determining the peak power that the subsystem may consume at any given time.
摘要翻译： 公开了用于管理诸如非易失性存储器系统（例如，闪存系统）的系统的峰值功率消耗的系统和方法。 该系统可以包括多个子系统和用于控制子系统的控制器。 每个子系统可以具有峰值的当前轮廓。 因此，控制器可以通过例如限制可以同时执行功率密集型操作的子系统的数量来控制系统的峰值功率，或通过辅助子系统来确定子系统可能消耗的峰值功率 给定时间
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公开(公告)号：US08503257B2
公开(公告)日：2013-08-06
申请号：US12847769
申请日：2010-07-30
申请人： Daniel J. Post , Hsiao Thio
发明人： Daniel J. Post , Hsiao Thio
IPC分类号： G11C7/00
CPC分类号： G06F11/008 , G11C16/3418 , G11C16/349 , G11C29/76 , G11C29/82 , G11C2029/0411
摘要： Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.
摘要翻译： 公开了用于基于在非易失性存储器（“NVM”）上执行的读取操作的一个或多个特性来处理读取干扰的系统和方法。 在一些实施例中，系统的控制电路可以产生基于读取操作的一个或多个特性确定的可变损伤值。 使用损伤值，控制电路可以更新与该块相关联的得分。 如果控制电路确定分数超过预定阈值，则该块的至少一部分可被重定位到NVM中的不同存储器位置。 在一些实施例中，块的部分可以在一段时间内重新定位。
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公开(公告)号：US08370603B2
公开(公告)日：2013-02-05
申请号：US12614369
申请日：2009-11-06
申请人： Tahoma Toelkes , Nir Jacob Wakrat , Kenneth L. Herman , Barry Corlett , Vadim Khmelnitsky , Anthony Fai , Daniel Jeffrey Post , Hsiao Thio
发明人： Tahoma Toelkes , Nir Jacob Wakrat , Kenneth L. Herman , Barry Corlett , Vadim Khmelnitsky , Anthony Fai , Daniel Jeffrey Post , Hsiao Thio
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/1016 , G06F2212/7208
摘要： The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.
摘要翻译： 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。
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公开(公告)号：US20120047409A1
公开(公告)日：2012-02-23
申请号：US12861718
申请日：2010-08-23
申请人： Daniel J. Post , Hsiao Thio
发明人： Daniel J. Post , Hsiao Thio
CPC分类号： G06F11/1048 , G06F12/0246 , G06F2212/7208 , G11C29/82 , G11C29/883 , G11C2029/0411 , H03M13/09 , H03M13/1515 , H03M13/152
摘要： Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block.
摘要翻译： 公开了用于从非易失性存储器（“NVM”）的一个或多个生长的坏块生成动态超级块的系统和方法。 在一些实施例中，动态超级块可以通过将来自NVM的一个或多个管芯的生长的坏块的存储器位置的子集拼接在一起而形成。 可以基于存储器位置的子集的至少一个可靠性测量来选择存储器位置的子集。 在一些实施例中，响应于检测动态超级块的一部分中的一个或多个访问失败，NVM接口可以使动态超级块的至少一部分退役。 在一些实施例中，NVM接口可以通过逐渐增加新的动态超级块的大小从动态超级块重建新的动态超级块。
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公开(公告)号：US20120030506A1
公开(公告)日：2012-02-02
申请号：US12847769
申请日：2010-07-30
申请人： Daniel J. Post , Hsiao Thio
发明人： Daniel J. Post , Hsiao Thio
CPC分类号： G06F11/008 , G11C16/3418 , G11C16/349 , G11C29/76 , G11C29/82 , G11C2029/0411
摘要： Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.
摘要翻译： 公开了用于基于在非易失性存储器（“NVM”）上执行的读取操作的一个或多个特性来处理读取干扰的系统和方法。 在一些实施例中，系统的控制电路可以产生基于读取操作的一个或多个特性确定的可变损伤值。 使用损伤值，控制电路可以更新与该块相关联的得分。 如果控制电路确定分数超过预定阈值，则该块的至少一部分可被重定位到NVM中的不同存储器位置。 在一些实施例中，块的部分可以在一段时间内重新定位。
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公开(公告)号：US20100161886A1
公开(公告)日：2010-06-24
申请号：US12614369
申请日：2009-11-06
申请人： Tahoma Toelkes , Nir Jacob Wakrat , Kenneth L. Herman , Barry Corlett , Vadim Khmelnitsky , Anthony Fai , Daniel Jeffrey Post , Hsiao Thio
发明人： Tahoma Toelkes , Nir Jacob Wakrat , Kenneth L. Herman , Barry Corlett , Vadim Khmelnitsky , Anthony Fai , Daniel Jeffrey Post , Hsiao Thio
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/1016 , G06F2212/7208
摘要： The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.
摘要翻译： 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。
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