公开(公告)号：US10359949B2

公开(公告)日：2019-07-23

申请号：US13285145

申请日：2011-10-31

申请人： Nicholas Seroff ,  Anthony Fai ,  Nir Jacob Wakrat

发明人： Nicholas Seroff ,  Anthony Fai ,  Nir Jacob Wakrat

IPC分类号： G11C29/00 ,  G06F3/06 ,  G06F11/30 ,  G06F11/34

摘要： Systems and methods are provided for obtaining and using nonvolatile memory (“NVM”) health information. Health information can include a variety of information associated with the performance and reliability of portions of an NVM device, such as the number of errors detected in a portion of NVM or the amount of time required to read from or program a portion of nonvolatile memory. During operation, address specific health information may be stored passively on a host device and provided as part of a command to a memory controller. The memory controller may extract the health information from the command and use the information to execute access requests. After an access request is completed, the memory controller can update the health information and transmit the information back to the host device.

公开(公告)号：US08966319B2

公开(公告)日：2015-02-24

申请号：US13032541

申请日：2011-02-22

申请人： Anthony Fai ,  Nir Jacob Wakrat ,  Nicholas Seroff

发明人： Anthony Fai ,  Nir Jacob Wakrat ,  Nicholas Seroff

IPC分类号： G06F11/00 ,  G06F11/36

CPC分类号： G06F11/362

摘要： This document generally describes systems, devices, methods, and techniques for obtaining debug information from a memory device. Debug information can include a variety of information associated with a memory device that can be used for debugging the device, such as a sequence of operations performed by the memory device and information regarding errors that have occurred (e.g., type of error, component of memory device associated with error). A memory device can be instructed by a host to obtain and provide debug information to the host. A memory device can be configured to obtain particular debug information using a variety of features, such as triggers. For instance, a memory device can use a trigger to collect debug information related to failed erase operations.

摘要翻译： 本文档通常描述了用于从存储器设备获取调试信息的系统，设备，方法和技术。 调试信息可以包括与可以用于调试设备的存储器设备相关联的各种信息，诸如由存储器件执行的操作序列和关于发生的错误的信息（例如，错误的类型，存储器的组件 设备与错误相关）。 主机可以指示存储器设备来获取并向主机提供调试信息。 存储器设备可以被配置为使用诸如触发器的各种特征来获得特定的调试信息。 例如，存储器件可以使用触发器来收集与失败的擦除操作有关的调试信息。

公开(公告)号：US08892831B2

公开(公告)日：2014-11-18

申请号：US12193551

申请日：2008-08-18

申请人： Vadim Khmelnitsky ,  Nir Jacob Wakrat

发明人： Vadim Khmelnitsky ,  Nir Jacob Wakrat

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F13/42

CPC分类号： G06F13/4239 ,  Y02D10/14 ,  Y02D10/151

摘要： In a managed memory subsystem, information associated with the memory subsystem is copied from volatile memory in the memory subsystem to host system memory. The copying can be over a standard interface. Responsive to memory subsystem power up from a powered down state or power loss, the information is copied from the host system memory back to the volatile memory in the memory subsystem, where the information can be used by the memory subsystem to perform memory operations. Transferring information from host system memory to volatile memory in a memory subsystem is faster and more power efficient than transferring the same information from non-volatile memory to volatile memory in the memory subsystem.

摘要翻译： 在托管存储器子系统中，与存储器子系统相关联的信息从存储器子系统中的易失性存储器复制到主机系统存储器。 复制可以通过标准接口。 响应于存储器子系统从断电状态或功率损耗加电，将信息从主机系统存储器复制回存储器子系统中的易失性存储器，其中存储器子系统可以使用该信息来执行存储器操作。 将信息从主机系统内存传输到存储器子系统中的易失性存储器比将存储器子系统中的相同信息从非易失性存储器传输到易失性存储器更快，更有效率。

公开(公告)号：US08880779B2

公开(公告)日：2014-11-04

申请号：US13204037

申请日：2011-08-05

申请人： Anthony Fai ,  Nir Jacob Wakrat ,  Nicholas Seroff

发明人： Anthony Fai ,  Nir Jacob Wakrat ,  Nicholas Seroff

IPC分类号： G06F12/02 ,  G06F11/263

CPC分类号： G06F11/263

摘要： In one implementation, a memory subsystem includes non-volatile memory, a memory controller that is communicatively connected to the non-volatile memory over a first bus, a host interface through which the memory controller communicates with a host controller over a second bus, and a joint test action group (JTAG) interface that provides the host controller with access to state information associated with the memory controller. The memory subsystem can be configured to be coupled to a board-level memory device that includes the host controller.

摘要翻译： 在一个实现中，存储器子系统包括非易失性存储器，通过第一总线通信地连接到非易失性存储器的存储器控​​制器，存储器控制器经由第二总线与主机控制器通信的主机接口，以及 联合测试动作组（JTAG）接口，为主机控制器提供与存储器控制器相关联的状态信息的访问。 存储器子系统可以被配置为耦合到包括主机控制器的电路板级存储器设备。

公开(公告)号：US08838877B2

公开(公告)日：2014-09-16

申请号：US12561173

申请日：2009-09-16

申请人： Nir Jacob Wakrat ,  Vadim Khmelnitsky ,  Daniel Jeffrey Post

发明人： Nir Jacob Wakrat ,  Vadim Khmelnitsky ,  Daniel Jeffrey Post

IPC分类号： G06F12/00

CPC分类号： G06F17/30138 ,  G06F12/0246 ,  G06F17/30218 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7207 ,  G06F2212/7211

摘要： A file system programs metadata on a non-volatile memory device. The metadata can include data associating files with ranges of logical block addresses. During a garbage collection process, the data can be used to determine portions of physical blocks of the non-volatile memory device that are associated with files that have been deleted. Using the programmed metadata during garbage collection results in erasure of larger portions of blocks and improved wear leveling.

摘要翻译： 文件系统在非易失性存储设备上编程元数据。 元数据可以包括将文件与逻辑块地址的范围相关联的数据。 在垃圾收集过程中，数据可用于确定与已被删除的文件相关联的非易失性存储器设备的物理块的部分。 在垃圾收集期间使用编程的元数据导致大部分块的擦除和改进的磨损均衡。

公开(公告)号：US08713404B2

公开(公告)日：2014-04-29

申请号：US13175610

申请日：2011-07-01

申请人： Anthony Fai ,  Nicholas Seroff ,  Nir Jacob Wakrat

发明人： Anthony Fai ,  Nicholas Seroff ,  Nir Jacob Wakrat

IPC分类号： G11C29/00 ,  H04L1/18 ,  H03M13/00 ,  G01V3/00 ,  G01R31/00 ,  G11C11/34 ,  G11C16/04

CPC分类号： G06F11/1004

摘要： In one implementation, a memory device includes non-volatile memory, a memory controller communicatively coupled to the non-volatile memory over a first bus, and a host interface through which the memory controller communicates with a host device over a second bus. The memory device can also include a signal conditioner of the host interface adapted to condition signals to adjust a signal level of signals received over the second bus based on signal level data received from the host device, wherein the signal level data relates to a voltage level of signals generated by the host device to encode data transmitted across the second bus.

摘要翻译： 在一个实现中，存储器设备包括非易失性存储器，通过第一总线通信地耦合到非易失性存储器的存储器控​​制器以及存储器控制器经由第二总线与主机设备通信的主机接口。 存储器装置还可以包括主机接口的信号调节器，其适于根据从主机设备接收的信号电平数据调节信号以调整在第二总线上接收的信号的信号电平，其中信号电平数据与电压电平相关 的由主机设备生成的信号，以对通过第二总线发送的数据进行编码。

公开(公告)号：US08626994B2

公开(公告)日：2014-01-07

申请号：US13308414

申请日：2011-11-30

申请人： Nicholas C. Seroff ,  Anthony Fai ,  Nir Jacob Wakrat

发明人： Nicholas C. Seroff ,  Anthony Fai ,  Nir Jacob Wakrat

IPC分类号： G06F13/00

CPC分类号： G06F3/0611 ,  G06F3/061 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0635 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F13/1684 ,  G06F2212/7204 ,  Y02D10/154

摘要： Systems and methods are provided for improved communications in a nonvolatile memory (“NVM”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one or more memory controllers of the system, and the memory controllers can toggle between multiple communications channels that extend to the NVM dies. Power islands may be incorporated into the system to electrically isolate system components associated with inactive communications channels.

摘要翻译： 提供了用于在非易失性存储器（“NVM”）系统中改善通信的系统和方法。 系统可以在多个通信通道之间切换，以提供主机设备与系统中包含的NVM管芯之间的点对点通信。 主机设备可以在扩展到系统的一个或多个存储器控制器的多个通信通道之间切换，并且存储器控制器可以在延伸到NVM管芯的多个通信通道之间切换。 功率岛可以并入到系统中以电隔离与非活动通信信道相关联的系统组件。

公开(公告)号：US20130326113A1

公开(公告)日：2013-12-05

申请号：US13482204

申请日：2012-05-29

申请人： Nir Jacob Wakrat ,  Andrew W. Vogan

发明人： Nir Jacob Wakrat ,  Andrew W. Vogan

IPC分类号： G06F12/00

CPC分类号： G06F12/0868 ,  G06F2212/214 ,  G06F2212/6024

摘要： Systems and methods are disclosed for usage of a flag bit to suppress data transfer in a mass storage system having non-volatile memory (“NVM”). In some embodiments, a host of the system can issue queue-able trim commands by dispatching non-data transfer write commands to the NVM. In some embodiments, the host can track the read behavior of a particular application over a period of time. As a result, the host can maintain heuristics of logical sectors that are most frequently read together. The host can then notify the NVM to pre-fetch data that the application will most likely request at some point in the future. These notifications can take the form of non-data transfer read commands. Each non-data transfer read commands can include a flag bit that is set to indicate that no data transfer is desired.

摘要翻译： 公开了使用标志位来抑制具有非易失性存储器（“NVM”）的大容量存储系统中的数据传输的系统和方法。 在一些实施例中，系统的主机可以通过向NVM发送非数据传输写命令来发出可排队修剪命令。 在一些实施例中，主机可以在一段时间内跟踪特定应用的读取行为。 因此，主机可以保持最常读在一起的逻辑扇区的启发式。 然后，主机可以通知NVM预先获取应用程序将来某个时候可能要求的数据。 这些通知可以采取非数据传输读取命令的形式。 每个非数据传输读取命令可以包括设置为指示不需要数据传输的标志位。

公开(公告)号：US20130290606A1

公开(公告)日：2013-10-31

申请号：US13459878

申请日：2012-04-30

申请人： Victor E. Alessi ,  Nicholas C. Seroff ,  Arjun Kapoor ,  Nir Jacob Wakrat ,  Anthony Fai

发明人： Victor E. Alessi ,  Nicholas C. Seroff ,  Arjun Kapoor ,  Nir Jacob Wakrat ,  Anthony Fai

IPC分类号： G06F12/00

CPC分类号： G06F13/1689 ,  G06F1/3225 ,  G06F1/3275 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/7201 ,  G06F2212/7206 ,  G06F2212/7208 ,  Y02D10/13 ,  Y02D10/14

摘要： Systems and methods are disclosed for power management of a system having non-volatile memory (“NVM”). One or more controllers of the system can optimally turn modules on or off and/or intelligently adjust the operating speeds of modules and interfaces of the system based on the type of incoming commands and the current conditions of the system. This can result in optimal system performance and reduced system power consumption.

摘要翻译： 公开了具有非易失性存储器（“NVM”）的系统的电源管理的系统和方法。 系统的一个或多个控制器可以基于输入命令的类型和系统的当前状况，最佳地打开或关闭模块和/或智能地调整系统的模块和接口的操作速度。 这可以导致最佳的系统性能和降低的系统功耗。

公开(公告)号：US20130151830A1

公开(公告)日：2013-06-13

申请号：US13323347

申请日：2011-12-12

申请人： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

发明人： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC分类号： G06F9/06

CPC分类号： G06F3/0643 ,  G06F11/1417 ,  G06F11/1435 ,  G06F12/0246 ,  G06F17/30218

摘要： Systems and methods are disclosed for mount-time reconciliation of data availability. During system boot-up, a non-volatile memory (“NVM”) driver can be enumerated, and an NVM driver mapping can be obtained. The NVM driver mapping can include the actual availability of LBAs in the NVM. A file system can then be mounted, and a file system allocation state can be generated. The file system allocation state can indicate the file system's view of the availability of LBAs. Subsequently, data availability reconciliation can be performed. That is, the file system allocation state and the NVM driver mapping can be overlaid and compared with one another in order to expose any discrepancies.

摘要翻译： 披露了数据可用性的安装时间调节的系统和方法。 在系统启动期间，可以列举非易失性存储器（“NVM”）驱动程序，并且可以获得NVM驱动程序映射。 NVM驱动程序映射可以包括NVM中LBA的实际可用性。 然后可以安装文件系统，并且可以生成文件系统分配状态。 文件系统分配状态可以指示文件系统对LBA可用性的视图。 随后，可以执行数据可用性协调。 也就是说，文件系统分配状态和NVM驱动程序映射可以被叠加并相互比较，以便暴露任何差异。