Decoding circuit and encoding circuit
    1.
    发明授权
    Decoding circuit and encoding circuit 有权
    解码电路和编码电路

    公开(公告)号:US08762806B2

    公开(公告)日:2014-06-24

    申请号:US13120878

    申请日:2009-09-15

    CPC classification number: H03M13/116 H03M13/114

    Abstract: A decoding circuit including a data buffer comprises a plurality of storage elements for storing data symbols, a processing circuit comprising a plurality of inputs and outputs, wherein the processing circuitry is configured to process data symbols received via the plurality of inputs and outputs. First and second decoding parameters are determined by a decoding rule and wherein the first and the second decoding parameters are not changed throughout the decoding process.

    Abstract translation: 包括数据缓冲器的解码电路包括用于存储数据符号的多个存储元件,包括多个输入和输出的处理电路,其中所述处理电路经配置以处理经由所述多个输入和输出接收的数据符号。 第一和第二解码参数由解码规则确定,并且其中第一和第二解码参数在整个解码过程中不改变。

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