公开(公告)号：US20160034023A1

公开(公告)日：2016-02-04

申请号：US14448096

申请日：2014-07-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Manish ARORA ,  Indrani Paul ,  Yasuko Eckert ,  Joseph L. Greathouse ,  Srilatha Manne

IPC: G06F1/32 ,  G06F12/08

CPC classification number: G06F1/3275 ,  G06F1/3206 ,  G06F12/0811 ,  G06F12/0862 ,  G06F2212/1016 ,  G06F2212/502 ,  Y02D10/14

Abstract: A system may determine that a processor has powered up. The system may determine a first prefetching policy based on determining that the processor has powered up. The system may fetch information, from a main memory and for storage by a cache associated with the processor, using the first prefetching policy. The system may determine, after fetching information using the first prefetching policy, to apply a second prefetching policy that is different than the first prefetching policy. The system may fetch information, from the main memory and for storage by the cache, using the second prefetching policy.

Abstract translation: 系统可以确定处理器已经通电。 该系统可以基于确定处理器通电来确定第一预取策略。 系统可以使用第一预取策略从主存储器获取信息，并且由与处理器相关联的高速缓存存储信息。 在使用第一预取策略获取信息之后，系统可以确定应用与第一预取策略不同的第二预取策略。 系统可以使用第二预取策略从主存储器获取信息并由高速缓存存储。

公开(公告)号：US20210191770A1

公开(公告)日：2021-06-24

申请号：US16718896

申请日：2019-12-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Karthik RAO ,  Shomit N. DAS ,  Manish ARORA

IPC: G06F9/48 ,  G06F9/38 ,  G06F1/324 ,  G06F1/20

Abstract: A processing unit preemptively cools selected compute units prior to initiating execution of a wavefront at the selected compute units. A scheduler of the processing unit identifies that a wavefront is to be executed at a selected subset of compute units of the processing unit. In response, the processing unit's temperature control subsystem activates one or more cooling elements to reduce the temperature of the subset of compute units, prior to the scheduler initiating execution of the wavefront. By preemptively cooling the compute units, the temperature control subsystem increases the difference between the initial temperature of the compute units and a thermal throttling threshold that triggers performance-impacting temperature control measures, such as the reduction of a compute unit clock frequency.