公开(公告)号：US20170139468A1

公开(公告)日：2017-05-18

申请号：US15394565

申请日：2016-12-29

Applicant: APPLE INC.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F1/32 ,  G06F13/364 ,  G06F13/42

CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

Abstract: Methods and apparatus for managing connections be multiple internal integrated circuits (ICs) of for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter. Chip™ (HSIC) in are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved dining, synchronization, and power consumption.

公开(公告)号：US10831700B2

公开(公告)日：2020-11-10

申请号：US16443660

申请日：2019-06-17

Applicant: Apple Inc.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F15/173 ,  G06F13/42 ,  G06F1/3287 ,  G06F13/364

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

公开(公告)号：US20190370217A1

公开(公告)日：2019-12-05

申请号：US16443660

申请日：2019-06-17

Applicant: Apple Inc.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F15/173 ,  G06F13/42 ,  G06F1/3287 ,  G06F13/364

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

公开(公告)号：US10324891B2

公开(公告)日：2019-06-18

申请号：US15818507

申请日：2017-11-20

Applicant: APPLE INC.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F15/17 ,  G06F15/173 ,  G06F13/42 ,  G06F1/3287 ,  G06F13/364

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

公开(公告)号：US20140181469A1

公开(公告)日：2014-06-26

申请号：US14046824

申请日：2013-10-04

Applicant: Apple Inc.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh de Cesare

IPC: G06F15/173

CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

Abstract translation: 用于管理例如高速内部设备接口的多个内部集成电路（IC）之间的连接的方法和装置。 公开了用于协调连接和断开事件的改进方案，和/或高速片上（HSIC）接口的暂停和恢复操作。 在一个示例性实施例中，公开了一种“设备”引用和“主机”引用的连接/断开过程，其提供改进的定时，同步和功率消耗。

公开(公告)号：US20180074573A1

公开(公告)日：2018-03-15

申请号：US15818507

申请日：2017-11-20

Applicant: APPLE INC.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F1/32 ,  G06F13/42 ,  G06F13/364

CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

公开(公告)号：US09823733B2

公开(公告)日：2017-11-21

申请号：US15394565

申请日：2016-12-29

Applicant: APPLE INC.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

IPC: G06F1/32 ,  G06F13/42 ,  G06F13/364

CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

公开(公告)号：US09535875B2

公开(公告)日：2017-01-03

申请号：US14046824

申请日：2013-10-04

Applicant: Apple Inc.

Inventor： Daniel Wilson ,  Anand Dalal ,  Josh de Cesare

IPC: G06F15/17 ,  G06F15/173 ,  G06F13/42 ,  G06F1/32

CPC classification number: G06F15/17362 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  Y02D10/151 ,  Y02D10/171 ,  Y02D50/20

Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

Abstract translation: 用于管理例如高速内部设备接口的多个内部集成电路（IC）之间的连接的方法和装置。 公开了用于协调连接和断开事件的改进方案，和/或高速片上（HSIC）接口的暂停和恢复操作。 在一个示例性实施例中，公开了一种“设备”引用和“主机”引用的连接/断开过程，其提供改进的定时，同步和功率消耗。