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    Secure Reduced Power Mode
    1.
    发明申请
    Secure Reduced Power Mode 有权

    公开(公告)号：US20220129527A1

    公开(公告)日：2022-04-28

    申请号：US17505318

    申请日：2021-10-19

    申请人： Apple Inc.

    发明人： Alan M. Dunn ,  Anish C. Trivedi ,  Ronnie G. Misra ,  Wade Benson ,  Anand Dalal

    IPC分类号： G06F21/31 ,  G06F21/62 ,  G06F21/64 ,  G06F1/3234 ,  G06F21/60

    摘要： Techniques are disclosed relating to maintaining device security associated with reduced power modes. In some embodiments, a computing device receives a request to place the computing device in a reduced power mode in which a first memory of the computing device is powered off. Based on the request, the computing device offloads a memory page from the first memory to a second memory such that the offloading includes encrypting the memory page. Based on a request to resume from the reduced power mode, the computing device restores the memory page from the second memory to the first memory such that the restoring includes decrypting the encrypted memory page. After initiating the restoring, the computing device presents a user authentication prompt asking for a user credential.

    System on a Chip with Fast Wake from Sleep
    2.
    发明申请
    System on a Chip with Fast Wake from Sleep 审中-公开

    公开(公告)号：US20200150745A1

    公开(公告)日：2020-05-14

    申请号：US16746121

    申请日：2020-01-17

    申请人： Apple Inc.

    发明人： Anand Dalal ,  Joshua P. de Cesare

    IPC分类号： G06F1/3287 ,  G06F1/3293 ,  G06F1/3231 ,  G06F1/3215 ,  G06F1/3209 ,  G06F9/4401

    摘要： In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

    Device dependent selection between modes for asymmetric serial protocols
    4.
    发明授权
    Device dependent selection between modes for asymmetric serial protocols 有权
    非对称串行协议模式之间的设备相关选择

    公开(公告)号：US09201827B2

    公开(公告)日：2015-12-01

    申请号：US14077115

    申请日：2013-11-11

    申请人： Apple Inc.

    发明人： Gregory T. Lydon ,  Lawrence G. Bolton ,  Anand Dalal

    IPC分类号： G06F3/00 ,  G06F13/38

    CPC分类号： G06F13/387 ,  G06F13/385

    摘要： A portable communication device (PCD) can automatically switch into different operating modes of an asymmetric communication protocol (such as USB) depending on the type of accessory connected. For example, the accessory can signal whether the PCD should operate in a first mode or a second mode using a hardware indicator such as identification resistor across two pins of a multi-pin connector and/or a software indicator such as a command protocol. The PCD can detect the accessory's signal and switch to the operating mode requested by the accessory.

    摘要翻译： 便携式通信设备（PCD）可以根据连接的附件的类型自动切换到不对称通信协议（例如USB）的不同操作模式。 例如，附件可以使用诸如多针连接器的两个引脚之类的诸如识别电阻器的硬件指示器和/或诸如命令协议的软件指示器来指示PCD是否应该以第一模式或第二模式操作。 PCD可以检测附件的信号并切换到附件要求的操作模式。

    Methods and apparatus for reducing power consumption within embedded systems
    7.
    发明授权
    Methods and apparatus for reducing power consumption within embedded systems 有权

    公开(公告)号：US10831700B2

    公开(公告)日：2020-11-10

    申请号：US16443660

    申请日：2019-06-17

    申请人： Apple Inc.

    发明人： Daniel Wilson ,  Anand Dalal ,  Josh De Cesare

    IPC分类号： G06F15/173 ,  G06F13/42 ,  G06F1/3287 ,  G06F13/364

    摘要： Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

    Managing security in a system on a chip (SOC) that powers down a secure processor
    9.
    发明授权
    Managing security in a system on a chip (SOC) that powers down a secure processor 有权
    管理芯片系统（SOC）中的安全性，从而降低安全处理器的功耗

    公开(公告)号：US09479331B2

    公开(公告)日：2016-10-25

    申请号：US14463763

    申请日：2014-08-20

    申请人： Apple Inc.

    发明人： Joshua P. de Cesare ,  Anand Dalal

    IPC分类号： G06F21/64 ,  H04L9/08 ,  G06F21/00

    CPC分类号： H04L9/0869 ,  G06F21/00 ,  G06F21/79 ,  G06F2212/1052 ,  G09C1/02 ,  H04L9/002 ,  H04L2209/12 ,  H04L2209/24

    摘要： An SOC includes a secure processor and an always-on component. The always-on component may remain powered even during times that other parts of the SOC are powered off. Particularly, the secure processor and related circuitry may be powered off, while various state for the secure processor may be stored in memory in an encrypted form. Certain state may be stored in the always-on component. When the secure processor is powered on again, the secure processor may check for the state in the always-on component. If the state is found, the secure processor may retrieve the state and use the state to access the encrypted memory state.

    摘要翻译： SOC包括一个安全处理器和一个永远在线的组件。 即使在SOC的其他部分断电的时间内，始终在线的组件也可能保持供电。 特别地，安全处理器和相关电路可以被断电，而用于安全处理器的各种状态可以以加密形式存储在存储器中。 某些状态可能存储在始终在线的组件中。 当安全处理器再次通电时，安全处理器可以检查始终打开组件中的状态。 如果发现状态，则安全处理器可以检索状态并使用该状态来访问加密的存储器状态。