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    Acceleration of cache-to-cache data transfers for producer-consumer communication
    1.
    发明授权
    Acceleration of cache-to-cache data transfers for producer-consumer communication 有权

    公开(公告)号：US10430343B2

    公开(公告)日：2019-10-01

    申请号：US15437843

    申请日：2017-02-21

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patrick N. Conway

    IPC: G06F12/128 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0888

    Abstract: A communication bypass mechanism accelerates cache-to-cache data transfers for communication traffic between caching agents that have separate last-level caches. A method includes bypassing a last-level cache of a first caching agent in response to a cache line having a modified state being evicted from a penultimate-level cache of the first caching agent and a communication attribute of a shadow tag entry associated with the cache line being set. The communication attribute indicates prior communication of the cache line with a second caching agent having a second last-level cache.

    Region probe filter for distributed memory system
    3.
    发明授权
    Region probe filter for distributed memory system 有权

    公开(公告)号：US09792210B2

    公开(公告)日：2017-10-17

    申请号：US14978476

    申请日：2015-12-22

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patrick N. Conway

    IPC: G06F12/08 ,  G06F12/0815 ,  G06F12/0813

    CPC classification number: G06F12/0895 ,  G06F2212/154

    Abstract: A probe filter determines whether to issue a probe to at least one other processing node in response to a memory access request, and includes a region probe filter directory, a line probe filter directory, and a controller. The region probe filter directory identifies regions of memory for which at least one cache line may be cached in a data processing system and a state of each region, wherein a size of each region corresponds to a plurality of cache lines. The line probe filter directory identifies cache lines cached in the data processing system and a state of each cache line. The controller accesses at least one of the region probe filter directory and the line probe filter directory in response to a memory access request to determine whether to issue the probe, and does not issue any probe in response to a read-only request.

    REGION PROBE FILTER FOR DISTRIBUTED MEMORY SYSTEM
    4.
    发明申请
    REGION PROBE FILTER FOR DISTRIBUTED MEMORY SYSTEM 有权

    公开(公告)号：US20170177484A1

    公开(公告)日：2017-06-22

    申请号：US14978476

    申请日：2015-12-22

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patrick N. Conway

    IPC: G06F12/08

    CPC classification number: G06F12/0895 ,  G06F2212/154

    Abstract: A probe filter determines whether to issue a probe to at least one other processing node in response to a memory access request, and includes a region probe filter directory, a line probe filter directory, and a controller. The region probe filter directory identifies regions of memory for which at least one cache line may be cached in a data processing system and a state of each region, wherein a size of each region corresponds to a plurality of cache lines. The line probe filter directory identifies cache lines cached in the data processing system and a state of each cache line. The controller accesses at least one of the region probe filter directory and the line probe filter directory in response to a memory access request to determine whether to issue the probe, and does not issue any probe in response to a read-only request.

    Region migration cache
    5.
    发明授权
    Region migration cache 有权

    公开(公告)号：US10387315B2

    公开(公告)日：2019-08-20

    申请号：US15095778

    申请日：2016-04-11

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patrick N. Conway

    IPC: G06F3/06 ,  G06F12/12 ,  G06F12/122 ,  G06F12/128 ,  G06F12/0802 ,  G06F12/0831 ,  G06F12/1009 ,  G06F12/1027

    Abstract: A memory access profiling and region migration technique makes allocation and replacement decisions for periodic migration of most frequently accessed regions of main memory to least frequently accessed regions of a region migration cache, in background operations. The technique improves performance in sparsely-used memory systems by migrating regions of main memory corresponding to the working footprint of main memory to the region migration cache. A method includes profiling a stream of memory accesses to generate an access frequency ranked list of address ranges of main memory and corresponding access frequencies based on memory addresses in the stream of memory accesses. The method includes periodically migrating to a region migration cache contents of a region of main memory selected based on the access frequency ranked list. The method includes storing a memory address range corresponding to the contents of the region migration cache in a tag map.

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