公开(公告)号：US20210028150A1

公开(公告)日：2021-01-28

申请号：US16523787

申请日：2019-07-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

公开(公告)号：US20200350180A1

公开(公告)日：2020-11-05

申请号：US16403393

申请日：2019-05-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L21/48 ,  H01L23/495 ,  H01L23/552 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/52

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and a second surface opposite to the first surface, an encapsulant, and an antenna. The encapsulant is disposed on the first surface of the carrier. The antenna is disposed on the encapsulant. The antenna includes a seed layer and a conductive layer.

公开(公告)号：US20180019221A1

公开(公告)日：2018-01-18

申请号：US15649545

申请日：2017-07-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bernd Karl APPELT ,  Kay Stefan ESSIG ,  Chi-Tsung CHIU

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L21/56 ,  H01L23/48 ,  H01L21/768 ,  H01L25/065

CPC classification number: H01L23/3135 ,  H01L21/486 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/76805 ,  H01L21/76879 ,  H01L23/145 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/2518 ,  H01L2224/32146 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2924/01022 ,  H01L2924/01029

Abstract: A semiconductor package device includes a first die, an adhesive layer, and an encapsulant layer. The first die comprises a first electrode at a first surface of the first die and a second electrode at a second surface of the first die opposite to the first surface of the first die. The adhesive layer is disposed on the first surface of the first die. The encapsulant layer encapsulates the first die and the adhesive layer, wherein substantially an entire surface of the second electrode is exposed from the encapsulant layer.

公开(公告)号：US20250029951A1

公开(公告)日：2025-01-23

申请号：US18223528

申请日：2023-07-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan ESSIG ,  You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/552 ,  H01L23/66 ,  H01L25/16

Abstract: An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.

公开(公告)号：US20220310410A1

公开(公告)日：2022-09-29

申请号：US17213033

申请日：2021-03-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L21/48 ,  H01L23/66 ,  H01L23/498 ,  H01L23/552 ,  H01Q1/22

Abstract: A substrate structure, a package structure, and a method for manufacturing an electronic package structure provided. The substrate structure includes a dielectric layer, a trace layer, and at least one wettable flank. The dielectric layer has a first surface and a second surface opposite to the first surface. The trace layer is embedded in the dielectric layer and exposed from the first surface of the dielectric layer. The at least one wettable flank is stacked with a portion of the trace layer embedded in the dielectric layer.

公开(公告)号：US20220302004A1

公开(公告)日：2022-09-22

申请号：US17205967

申请日：2021-03-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/498 ,  H01L21/48

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface of the substrate. The substrate has a through opening extending between the first surface of the substrate and the second surface of the substrate. The semiconductor device package also includes a conductive pad in the through opening and approximal to the second surface of the substrate. The conductive pad has a first surface and a second surface opposite to the first surface of the conductive pad. The semiconductor device package also includes a conductive pillar in contact with the first surface of the conductive pad. The second surface of the conductive pad protrudes from the second surface of the substrate. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US20220301989A1

公开(公告)日：2022-09-22

申请号：US17204833

申请日：2021-03-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Kuang-Hsiung CHEN ,  Bernd Karl APPELT

IPC: H01L23/495 ,  H01L21/768 ,  H01L21/50 ,  H01L23/31

Abstract: A substrate structure and a semiconductor package structure including the same are provided. The substrate structure includes a circuit layer and a dielectric structure. The circuit layer has a bottom surface and a top surface opposite to the bottom surface. The dielectric structure around the circuit layer. The dielectric structure covers a first part of the bottom surface of the circuit layer, and exposes a second part of the bottom surface and the top surface of the circuit layer. The dielectric structure exposes the top surface of the circuit layer. In addition, a method of manufacturing a semiconductor package structure is also provided.

公开(公告)号：US20210327841A1

公开(公告)日：2021-10-21

申请号：US16854730

申请日：2020-04-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.

公开(公告)号：US20210225746A1

公开(公告)日：2021-07-22

申请号：US17221597

申请日：2021-04-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bernd Karl APPELT ,  You-Lung YEN ,  Kay Stefan ESSIG

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor package includes a base material, a capture land, an interconnection structure, a semiconductor chip and an encapsulant. The base material has a top surface and an inner lateral surface. The capture land is disposed in or on the base material, and has an outer side surface. The interconnection structure is disposed along the inner lateral surface of the base material, and on the capture land. The interconnection structure has an outer side surface. An outer side surface of the semiconductor package includes the outer side surface of the capture land and the outer side surface of the interconnection structure. The semiconductor chip is disposed on the top surface of the base material. The encapsulant is disposed adjacent to the top surface of the base material, and covers the semiconductor chip.

公开(公告)号：US20230042800A1

公开(公告)日：2023-02-09

申请号：US17396604

申请日：2021-08-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/433 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

Abstract: An electronic package is provided in the present disclosure. The electronic package comprises: a heat spreading component; a first electronic component disposed on the heat spreading component; and a second electronic component disposed on the first electronic component, wherein the second electronic component comprises an interconnection structure passing through the second electronic component and electrically connecting the first electronic component. In this way, through the use of the interconnection structure, the heat dissipation of the electronic components in the package can be improved. Also, through the use of the encapsulant, the stacked electronic components can be protected by the encapsulant so as to avoid being damaged.