公开(公告)号：US20240119991A1

公开(公告)日：2024-04-11

申请号：US18488656

申请日：2023-10-17

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

CPC classification number: G11C11/40626 ,  G11C11/4074 ,  G11C11/4091 ,  G11C2211/4061

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US20210201987A1

公开(公告)日：2021-07-01

申请号：US17182341

申请日：2021-02-23

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US20210020231A1

公开(公告)日：2021-01-21

申请号：US16515351

申请日：2019-07-18

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US10437313B2

公开(公告)日：2019-10-08

申请号：US15275213

申请日：2016-09-23

Applicant: Apple Inc.

Inventor： John G. Dorsey ,  Christopher W. Chaney ,  Norman J. Rohrer ,  Cyril De La Cropte De Chanterac

IPC: G06F1/3287 ,  G06F1/3206 ,  G06F1/324

Abstract: Embodiments provide for a computer implemented method comprising sampling one or more power and performance metrics of a processor; determining an energy cost per instruction based on the one or more power and performance metrics; determining an efficiency metric based on the energy cost per instruction; computing an efficiency control error based on a difference between a current efficiency metric and a target efficiency metric; setting an efficiency control effort based on the efficiency control error; determining a performance control effort, the performance control effort determined by a performance controller for the processor; and adjusting the performance control effort based on the efficiency control effort, wherein adjusting the performance control effort reduces power consumption of the processor.

公开(公告)号：US10067483B1

公开(公告)日：2018-09-04

申请号：US14471164

申请日：2014-08-28

Applicant: Apple Inc.

Inventor： Ching E. Ho ,  Antonietta Oliva ,  James S. Ismail ,  John G. Dorsey ,  Keith Cox ,  Norman J. Rohrer

IPC: G06Q10/06 ,  G06F17/18 ,  G05B19/4065 ,  G05B13/02 ,  G05B23/02

Abstract: In an embodiment, a lifetime controller is configured to monitor operating conditions for a device, and to control operating conditions based on the previous conditions to improve the reliability characteristics of the device while permitting strenuous use as available. For example, the lifetime controller may permit strenuous use when the device is first powered on. Once a specified amount of strenuous use has occurred, the controller may cause the operating conditions to be reduced to reduce the wear on the device, and thus help to extend the lifetime of the device. Similarly, if a device is used in less strenuous conditions, the controller may accumulate credit which may be expended by permitting the device to operate in more strenuous conditions for a period of time.

公开(公告)号：US20140281601A1

公开(公告)日：2014-09-18

申请号：US13826695

申请日：2013-03-14

Applicant: APPLE INC.

Inventor： Rakesh J. Patel ,  Norman J. Rohrer

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

Abstract: Embodiments of an apparatus are disclosed that may allow for the isolation of power domains. The apparatus may include a first power switch, a second power switch, and a boundary switch. The first power switch may be coupled between a global power supply and a first local power supply, and the second power switch may be coupled between the global power supply and a second local power supply. The first and second power switches may open in response to first and second power down signals respectively. The boundary switch may be coupled between the first local power supply and the second local power supply and may be configured to open in response to an isolation signal.

Abstract translation: 公开了可以允许电源域的隔离的装置的实施例。 该装置可以包括第一电源开关，第二电源开关和边界开关。 第一电源开关可以耦合在全局电源和第一本地电源之间，并且第二电源开关可以耦合在全局电源和第二本地电源之间。 第一和第二电源开关可以分别响应于第一和第二掉电信号而断开。 边界开关可以耦合在第一本地电源和第二本地电源之间，并且可以被配置为响应于隔离信号而打开。

公开(公告)号：US20220254410A1

公开(公告)日：2022-08-11

申请号：US17687107

申请日：2022-03-04

Applicant: Apple Inc.

Inventor： Liang Deng ,  Norman J. Rohrer ,  Yizhang Yang ,  Arpit Mittal

IPC: G11C11/406 ,  G11C11/4074 ,  G11C11/4091

Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.

公开(公告)号：US10763859B2

公开(公告)日：2020-09-01

申请号：US16687026

申请日：2019-11-18

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: G11C5/04 ,  H03K5/01 ,  H03K19/0175 ,  G11C5/14 ,  H02J1/08 ,  H03K5/00

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US20200162077A1

公开(公告)日：2020-05-21

申请号：US16687026

申请日：2019-11-18

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: H03K19/0175 ,  G11C5/14 ,  H03K5/01

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US11121711B2

公开(公告)日：2021-09-14

申请号：US17008559

申请日：2020-08-31

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: H03K5/00 ,  H03K19/0175 ,  H03K5/01 ,  G11C5/14 ,  H02J1/08

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.