摘要:
A method for evaluating an output of a sequential circuit 2 by storing a series of output pulses from the sequential circuit 2 and determining whether the output pulses 4 toggled as desired. Also a circuit 1 for evaluating an output 4 of a sequential circuit 2 that determines if the output pulses 4 toggled as desired.
摘要:
A method and circuit for verifying the burst-mode operation and the frequency characterization of a self-timed sequential circuit 2 in burst mode by detecting and measuring an output 15 of the self-timed sequential circuit 2.
摘要:
An embodiment of the invention is circuitry 25 that contains a programmable delay 8 and a pulse generator 16 that send clock signals of a certain frequency to a device under test 1. The programmable delay 8 increases the frequency of the clock signal to the device under test 1 until the device under test fails. The cycle time measurement of the device under test 1 is the period of maximum frequency at which the device under test 1 operates properly.
摘要:
An embodiment of the invention is a method for measuring access time where the frequency of a ring oscillator is measured with and without a device under test 1 in the ring. Those two frequencies are compared to calculate the access time of the device under test 1. Another embodiment of the invention is circuitry 25 that measures the frequency of a ring oscillator with and without a device under test 1. Again the two frequencies are compared to calculate the access time of the device under test 1.
摘要:
This application describes a peripheral cell structure for VLSI chips that requires the use of standard cells having both input and output capability connected to nearly all of the signal carrying pins. The cells function is alterable (to input or output and to where the data input signals originate) by control signals which may originate with a control register. The clock input signal is split into two independent signals to selectively disable the input or output registers, thus allowing the control register to be changed without affecting the contents of the other two registers. An early signal is also provided to prepare for mode changes.
摘要:
This application teaches that more accurate measurements of clock skew can be had by providing a clock monitor pin directly connected to the clock bus internal to the VLSI chip.