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公开(公告)号:US10347619B2
公开(公告)日:2019-07-09
申请号:US15770624
申请日:2016-08-19
Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
Inventor: Kui Xiao
IPC: H01L27/02 , H01L29/06 , H01L29/78 , H01L29/866
Abstract: Disclosed is a semiconductor device having an electrostatic discharge protection structure. The electrostatic discharge protection structure is a diode connected between a gate electrode and a source electrode of the semiconductor device. The diode comprises a diode body and two connection portions connected to two ends of the diode body and respectively used for electrically connecting to the gate electrode and the source electrode. Lower parts of the two connection portions are respectively provided with a trench. An insulation layer is provided on an inner surface of the trench and the surface of a substrate between trenches. The diode body is provided on the insulation layer on the surface of the substrate. The connection portions respectively extend downwards into respective trenches from one end of the diode body. A dielectric layer is provided on the diode, and a metal conductor layer is provided on the dielectric layer.
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公开(公告)号:US12183818B2
公开(公告)日:2024-12-31
申请号:US17417677
申请日:2019-12-23
Applicant: SOUTHEAST UNIVERSITY , CSMC TECHNOLOGIES FAB2 CO., LTD.
Inventor: Weifeng Sun , Rongcheng Lou , Kui Xiao , Feng Lin , Jiaxing Wei , Sheng Li , Siyang Liu , Shengli Lu , Longxing Shi
Abstract: A power semiconductor device includes: a substrate; drain metal; a drift region; a base region; a gate structure; a first conductive type doped region contacting the base region on the side of the base region distant from the gate structure; a source region provided in the base region and between the first conductive type doped region and the gate structure; contact metal that is provided on the first conductive type doped region and forms a contact barrier having rectifying characteristics together with the first conductive type doped region below; and source metal wrapping the contact metal and contacting the source region.
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公开(公告)号:US11894458B2
公开(公告)日:2024-02-06
申请号:US17762206
申请日:2020-09-25
Applicant: SOUTHEAST UNIVERSITY , CSMC TECHNOLOGIES FAB2 CO., LTD.
Inventor: Jiaxing Wei , Qichao Wang , Kui Xiao , Dejin Wang , Li Lu , Ling Yang , Ran Ye , Siyang Liu , Weifeng Sun , Longxing Shi
IPC: H01L29/78
CPC classification number: H01L29/7825
Abstract: A lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS), including: a trench gate including a lower part inside a trench and an upper part outside the trench, a length of the lower part in a width direction of a conducting channel being less than that of the upper part, and the lower part extending into a body region and having a depth less than that of the body region; an insulation structure arranged between a drain region and the trench gate and extending downwards into a drift region, a depth of the insulation structure being less than that of the drift region.
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公开(公告)号:US11515395B2
公开(公告)日:2022-11-29
申请号:US17624336
申请日:2020-09-25
Applicant: SOUTHEAST UNIVERSITY , CSMC TECHNOLOGIES FAB2 CO., LTD
Inventor: Siyang Liu , Ningbo Li , Dejin Wang , Kui Xiao , Chi Zhang , Sheng Li , Xinyi Tao , Weifeng Sun , Longxing Shi
IPC: H01L29/872 , H01L29/20 , H01L29/66 , H01L21/02 , H01L29/06 , H01L29/861
Abstract: A gallium nitride power device, including: a gallium nitride substrate; cathodes; a plurality of gallium nitride protruding structures arranged on the gallium nitride substrate and between the cathodes, a groove is formed between adjacent gallium nitride protruding structures; an electron transport layer, covering a top portion and side surfaces of each of the gallium nitride protruding structures; a gallium nitride layer, arranged on the electron transport layer and filling each of the grooves; a plurality of second conductivity type regions, where each of the second conductivity type regions extends downward from a top portion of the gallium nitride layer into one of the grooves, and the top portion of each of the gallium nitride protruding structures is higher than a bottom portion of each of the second conductivity type regions; and an anode, arranged on the gallium nitride layer and the second conductivity type regions.
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公开(公告)号:US12224340B2
公开(公告)日:2025-02-11
申请号:US17417663
申请日:2019-12-19
Applicant: SOUTHEAST UNIVERSITY , CSMC TECHNOLOGIES FAB2 CO., LTD.
Inventor: Siyang Liu , Chi Zhang , Kui Xiao , Guipeng Sun , Dejin Wang , Jiaxing Wei , Li Lu , Weifeng Sun , Shengli Lu
IPC: H01L29/778 , H01L29/20 , H01L29/205 , H01L29/207
Abstract: A heterojunction semiconductor device with a low on-resistance includes a metal drain electrode, a substrate, and a buffer layer. A current blocking layer is arranged in the buffer layer, a gate structure is arranged on the buffer layer, and the gate structure comprises a metal gate electrode, GaN pillars and AlGaN layers, wherein a metal source electrode is arranged above the metal gate electrode; and the current blocking layer comprises multiple levels of current blocking layers, the centers of symmetry of the layers are collinear, and annular inner openings of the current blocking layers at all levels gradually become smaller from top to bottom. The AlGaN layers and the GaN pillars are distributed in a honeycomb above the buffer layer.
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