公开(公告)号：US11347299B2

公开(公告)日：2022-05-31

申请号：US16837445

申请日：2020-04-01

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Kimiyasu Mizuno ,  Tsuyoshi Minami ,  Shuhei Uchida ,  Munetaka Seo

IPC: G06F1/3293 ,  G04G19/00 ,  G06F1/3234

Abstract: An electronic device includes a memory; a first processor; a second processor for which power consumption is lower than power consumption of the first processor; a communicator that communicates with an external device; and a switch that switches a connection destination of the communicator to the first processor or the second processor. The second processor is configured to, in a case in which a condition for transitioning to a power suppression state that is an operating state in which power consumption is suppressed is satisfied, connect the communicator by the switch. The first processor is configured to, in a case in which a condition for transitioning to a normal state that is a normal operating state is satisfied, connect the communicator by the switch.

公开(公告)号：US11774916B2

公开(公告)日：2023-10-03

申请号：US17539234

申请日：2021-12-01

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Tsuyoshi Minami ,  Kimiyasu Mizuno ,  Hideo Suzuki ,  Takashi Suenaga ,  Keiichi Nomura ,  Shuhei Uchida ,  Munetaka Seo

IPC: G04G19/06 ,  G06F3/14 ,  G06F3/147 ,  G06F1/16 ,  G06F1/3287 ,  G04G19/02 ,  G04G9/00 ,  G06F1/3234 ,  G06F1/3296

CPC classification number: G04G19/06 ,  G04G9/00 ,  G04G19/02 ,  G06F1/163 ,  G06F1/3265 ,  G06F1/3287 ,  G06F1/3296 ,  G06F3/147 ,  G06F3/1423 ,  G06F3/1438 ,  G04G9/0017 ,  G09G2330/021 ,  G09G2330/022 ,  G09G2340/14 ,  G09G2360/06 ,  Y02D10/00 ,  Y02D30/50

Abstract: An electronic device includes first and second processors, and first and second display units. While the first and second processors cooperate with each other and perform a display operation including a time display, the first processor can be set to a normal mode, a low power mode in which a power consumption is lower than a power consumption in the normal mode, or a pause mode in which a power consumption is lower than the power consumption in the low power mode, and the first processor is stopped. In the normal or low power modes, the first processor controls such that the first display unit displays a time, and the second processor controls such that the second display unit does not display a time. In the pause mode, the first display unit is turned off, and the second processor controls such that the second display unit displays a time.

公开(公告)号：US11209895B2

公开(公告)日：2021-12-28

申请号：US16837023

申请日：2020-04-01

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Kimiyasu Mizuno ,  Tsuyoshi Minami ,  Shuhei Uchida ,  Munetaka Seo

IPC: G06F1/32 ,  G06F1/3293

Abstract: An electronic device includes a first display; a second display for which power consumption is lower than that of the first display; a first communicator; a second communicator for which power consumption is lower than that of the first communicator; a memory; a first processor; a second processor for which power consumption is lower than that of the first processor; and an operation acquirer to, when an operation from a user is acquired, send a wake-up signal that causes the first processor to recover from a sleep state in which power consumption is suppressed to a normal state. The first processor is configured to, when a condition for transitioning to a power suppression state is satisfied, send a power suppression notification to the second processor, stop displaying by the first display and communicating by the first communicator, and transition to the sleep state, and to, when the wake-up signal is received from the second processor or the operation acquirer, recover to the normal state from the sleep state, and start displaying by the first display and communicating by the first communicator. The second processor is configured to, when the second processor receives the power suppression notification from the first processor, start displaying by the second display and communicating by the second communicator, and to, when a condition for transitioning to the normal state is satisfied, send the wake-up signal to the first processor, and stop the displaying by the second display and the communicating by the second communicator.

公开(公告)号：US11157891B2

公开(公告)日：2021-10-26

申请号：US16189202

申请日：2018-11-13

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Kimiyasu Mizuno ,  Tsuyoshi Minami ,  Hideo Suzuki ,  Takashi Suenaga ,  Keiichi Nomura ,  Shuhei Uchida ,  Munetaka Seo ,  Itsuki Yamashita

IPC: G06Q20/32 ,  G06Q20/36

Abstract: An information device makes a payment with a payment terminal through a contactless communication, using amount data of an electronic purse function of a mobile device. The mobile device with the electronic purse function permits the information device to be used for performing payment processing with the payment terminal, using amount data of the electronic purse function of the mobile device. A wearable information device includes an image taking unit configured to take an image of an object in the direction of line of vision of a user, and notifies the information device of the presence or absence of the information device in a taken image. The information device makes a payment with the payment terminal through a contactless communication based on the notification from the wearable information device of the presence or absence of the information device.

公开(公告)号：US11048322B2

公开(公告)日：2021-06-29

申请号：US16781130

申请日：2020-02-04

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Tsuyoshi Minami ,  Kimiyasu Mizuno ,  Hideo Suzuki ,  Takashi Suenaga ,  Keiichi Nomura ,  Shuhei Uchida ,  Shigeki Kitamura ,  Munetaka Seo ,  Toshiya Sakurai

IPC: G06F1/32 ,  G06F1/26 ,  G06F1/3287 ,  G06F1/3234 ,  G06F1/3215 ,  G06F1/16 ,  G06F1/3293 ,  G01C21/00

Abstract: An information processing apparatus includes a first processor, a second processor, and a positioning processor. The second processor consumes a reduced amount of power compared to the first processor during an operation. The positioning processor receives radio waves from positioning satellites and converts the radio waves into positioning data. The second processor controls the positioning processor. The second processor stores the positioning data received from the positioning processor. The second processor transfers the stored positioning data to the first processor at a timing determined in accordance with an operating condition of the first processor.

公开(公告)号：US20170261382A1

公开(公告)日：2017-09-14

申请号：US15363751

申请日：2016-11-29

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Shuhei Uchida

IPC: G01K7/16 ,  H01L23/34 ,  H01L27/06

CPC classification number: G01K7/16 ,  H01L23/34 ,  H01L27/0629

Abstract: A semiconductor integrated circuit, including: a power supply input terminal to input a power supply voltage for operating the semiconductor integrated circuit; and an output terminal to output an output voltage at a same voltage level as a voltage level of the power supply voltage which is input from the power supply input terminal.

公开(公告)号：US10591982B2

公开(公告)日：2020-03-17

申请号：US15864320

申请日：2018-01-08

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Tsuyoshi Minami ,  Kimiyasu Mizuno ,  Hideo Suzuki ,  Takashi Suenaga ,  Keiichi Nomura ,  Shuhei Uchida ,  Shigeki Kitamura ,  Munetaka Seo ,  Toshiya Sakurai

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/3287 ,  G06F1/3234 ,  G06F1/3215 ,  G06F1/16 ,  G06F1/3293 ,  G01C21/00

Abstract: An information processing apparatus includes a first processor, a second processor and a positioning processor. The second processor consumes a reduced amount of power compared to the first processor during an operation. The positioning processor receives radio waves from positioning satellites and converts the radio waves into positioning data. The second processor controls the positioning processor. The second processor stores the positioning data received from the positioning processor. The second processor transfers the stored positioning data to the first processor at a timing determined in accordance with an operating condition of the first processor.

公开(公告)号：US20180374498A1

公开(公告)日：2018-12-27

申请号：US16015016

申请日：2018-06-21

Applicant: Casio Computer Co., Ltd.

Inventor： Keiichi Nomura ,  Toshiya Sakurai ,  Hideo Suzuki ,  Tsuyoshi Minami ,  Shuhei Uchida ,  Shigeki Kitamura ,  Kimiyasu Mizuno ,  Takashi Suenaga ,  Munetaka Seo

IPC: G10L25/63 ,  H04R3/00

Abstract: An electronic device includes an audio receiver which receives audio of a user and converts the audio into audio information, and a processor. The processor performs first obtaining emotion information on a basis of the audio information converted by the audio receiver and second obtaining user-related information or environment information. In the first obtaining, the emotion information is obtained on a basis of the audio information of a predetermined timing which is decided on a basis of the user-related information or the environment information obtained in the second obtaining.

公开(公告)号：US11481011B2

公开(公告)日：2022-10-25

申请号：US16833432

申请日：2020-03-27

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Keiichi Nomura ,  Tsuyoshi Minami ,  Shuhei Uchida ,  Toshiya Sakurai ,  Hideo Suzuki

IPC: G06F1/3287 ,  G06F1/3206 ,  G06F1/16

Abstract: An input terminal connected to both a terminal of the first device outputting a signal including a period of a low voltage greater than or equal to a predetermined period and a terminal of the second device outputting a periodic signal alternately repeating a high voltage and a low voltage less than the predetermined period via one signal line is included. When a signal input to the input terminal includes a period of a low voltage greater than or equal to the predetermined period, it is determined that a signal output from the first device is input.

公开(公告)号：US11209781B2

公开(公告)日：2021-12-28

申请号：US16355529

申请日：2019-03-15

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Tsuyoshi Minami ,  Kimiyasu Mizuno ,  Hideo Suzuki ,  Takashi Suenaga ,  Keiichi Nomura ,  Shuhei Uchida ,  Munetaka Seo

IPC: G04G19/06 ,  G06F3/14 ,  G06F3/147 ,  G06F1/16 ,  G06F1/3287 ,  G04G19/02 ,  G06F1/3234 ,  G06F1/3296 ,  G04G9/00

Abstract: An electronic device includes first and second processors, and first and second display units. While the first and second processors cooperate with each other and perform a display operation including a time display, the first processor can be set to a normal mode, a low power mode in which a power consumption is lower than a power consumption in the normal mode, or a pause mode in which a power consumption is lower than the power consumption in the low power mode, and the first processor is stopped. In the normal or low power modes, the first processor controls such that the first display unit displays a time, and the second processor controls such that the second display unit does not display a time. In the pause mode, the first display unit is turned off, and the second processor controls such that the second display unit displays a time.